On 10/05/18 13:59, Alexandru Stefan ISAILA wrote: > Hello, > > We want to add the page access functionality to the SVM code. We have > been trying to add 4 bits in the pte but all seem to be taken. > > Is there a way to accommodate them in the 24 bit flag mask? > > I think it can be done by moving the 4 protection key field bits from > 22:19 to 23:30 so we can have the 19:16 for access. Not sure if bit 23 > is clear > > Any thoughts on this matter are appreciated.
The 4 protection key bits bits are architecturally defined. You cannot move the bits, or you will break Intel. That said, I presume you mean the PTEs for the NPT pagetables? AMD hardware doesn't support PKU yet, and if they were to implement support, I doubt it would be implemented for the NPT tables. Therefore, I think you can just alias the 4 bits. ~Andrew _______________________________________________ Xen-devel mailing list [email protected] https://lists.xenproject.org/mailman/listinfo/xen-devel
