Hi Luca, On Fri, Jul 8, 2022 at 2:01 PM Luca Fancellu <[email protected]> wrote: > > Hi Jens, > > > On 22 Jun 2022, at 14:42, Jens Wiklander <[email protected]> wrote: > > > > SMCCC v1.2 AArch64 allows x0-x17 to be used as both parameter registers > > and result registers for the SMC and HVC instructions. > > > > Arm Firmware Framework for Armv8-A specification makes use of x0-x7 as > > parameter and result registers. > > > > Let us add new interface to support this extended set of input/output > > registers. > > > > This is based on 3fdc0cb59d97 ("arm64: smccc: Add support for SMCCCv1.2 > > extended input/output registers") by Sudeep Holla from the Linux kernel > > > > The SMCCC version reported to the VM is bumped to 1.2 in order to support > > handling FF-A messages. > > > > Signed-off-by: Jens Wiklander <[email protected]> > > --- > > > > I think you need to update the copyright information of the smccc.h header > (maintainers can confirm if it’s needed), > also it seems that you agreed with Julien to update the commit message with a > reference to the spec but maybe you > forgot about that: > https://patchwork.kernel.org/comment/24897413/
I'm sorry, I'll fix it. > > With these addressed: > > Reviewed-by: Luca Fancellu <[email protected]> Thanks, I'll add the to the V5 of the patch set. Cheers, Jens > > > >
