On 27/07/2021 15:36, luja wrote: > Hi all, > > No, the correct behavior is to just use the host bridge as it is > correct and works!
What evidence do you have of this claim? Have you actually deleted the workaround, and confirmed that Xen works fully and correctly on this hardware? If not, that is your next task. > Just the PCI config space is done wrongly in the board's BIOS? These details are typically hard wired. > > To get the truth... > I disassembled the cooler, cleaned the "phase change" wax from it, > photographed the laser engraving of the flip chip die and compared > the text with the errata "spec update" by Intel. > > According to the laser marking and the errata the chip is a 5520 with C2 > stepping. As it has an SLH3P marking on its die. I made a photo of it, > which is available on request. > The errata sheet refers it to C2 stepping and states it supports Intel > Trusted Execution TXT. This is on page 11 (3rd line of table) of said > intel errata. > https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/5520-and-5500-chipset-ioh-specification-update.pdf I'm afraid that this doesn't prove anything. Topmarking fraud sadly exists. A famous example is the overclocking multiplier which used to be an external pin to chips, and no longer is because the cheaper slower CPUs had their topmarkings forged and sold as expensive faster ones. ~Andrew
