Hi Stefano,
On 03/16/2018 08:27 PM, Stefano Stabellini wrote:
On Mon, 12 Mar 2018, [email protected] wrote:
From: Julien Grall <[email protected]>
A recent update to the ARM SMCCC_ARCH_WORKAROUND_1 specification (see [1])
allows firmware to return a non zero, positive value, to describe that
although the mitigation is implemented at the higher exception level,
the CPU on which the call is made is not affected.
Relax the check on the return value from ARM_WORKAROUND_1 so that we
only error out if the returned value is negative.
[1] https://developer.arm.com/support/security-update/downloads
"Firmware interfaces for mitigating CVE-2017-5715 System Software on Arm
Systems"
Signed-off-by: Julien Grall <[email protected]>
Reviewed-by: Stefano Stabellini <[email protected]>
---
This patch should be backported as part of XSA-254.
There are potential more optimization to do as part of this
relaxation. For instance, we dropping the CPU ID recognition and
only look ad the SMCCC.
Indeed there are. I assume more patches will be coming?
It is not in my immediate plan. I pointed out if someone wants to
implement and send a patch.
Cheers,
--
Julien Grall
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