From: Manish Jaggi <[email protected]> This patch is ported to xen from linux commit 63000dd8006dc987db31ba670edc23142ea91e01
As we're about to access the Active Priority registers a lot more, let's define accessors that take the register number as a parameter. Signed-off-by: Manish Jaggi <[email protected]> --- xen/arch/arm/arm64/vsysreg_errata.c | 92 +++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/xen/arch/arm/arm64/vsysreg_errata.c b/xen/arch/arm/arm64/vsysreg_errata.c index 93e9143a0d..b2a95a69dc 100644 --- a/xen/arch/arm/arm64/vsysreg_errata.c +++ b/xen/arch/arm/arm64/vsysreg_errata.c @@ -97,6 +97,98 @@ void handle_igrpen1(struct cpu_user_regs *regs, int regidx, bool read, __vgic_v3_write_igrpen1(regs, regidx); } +void __vgic_v3_write_ap0rn(u32 val, int n) +{ + switch (n) + { + case 0: + WRITE_SYSREG32(val, ICH_AP0R0_EL2); + break; + case 1: + WRITE_SYSREG32(val, ICH_AP0R1_EL2); + break; + case 2: + WRITE_SYSREG32(val, ICH_AP0R2_EL2); + break; + case 3: + WRITE_SYSREG32(val, ICH_AP0R3_EL2); + break; + default: + unreachable(); + } +} + +void __vgic_v3_write_ap1rn(u32 val, int n) +{ + switch (n) + { + case 0: + WRITE_SYSREG32(val, ICH_AP1R0_EL2); + break; + case 1: + WRITE_SYSREG32(val, ICH_AP1R1_EL2); + break; + case 2: + WRITE_SYSREG32(val, ICH_AP1R2_EL2); + break; + case 3: + WRITE_SYSREG32(val, ICH_AP1R3_EL2); + break; + default: + unreachable(); + } +} + +u32 __vgic_v3_read_ap0rn(int n) +{ + u32 val; + + switch (n) + { + case 0: + val = READ_SYSREG32(ICH_AP0R0_EL2); + break; + case 1: + val = READ_SYSREG32(ICH_AP0R1_EL2); + break; + case 2: + val = READ_SYSREG32(ICH_AP0R2_EL2); + break; + case 3: + val = READ_SYSREG32(ICH_AP0R3_EL2); + break; + default: + unreachable(); + } + + return val; +} + +u32 __vgic_v3_read_ap1rn(int n) +{ + u32 val; + + switch (n) + { + case 0: + val = READ_SYSREG32(ICH_AP1R0_EL2); + break; + case 1: + val = READ_SYSREG32(ICH_AP1R1_EL2); + break; + case 2: + val = READ_SYSREG32(ICH_AP1R2_EL2); + break; + case 3: + val = READ_SYSREG32(ICH_AP1R3_EL2); + break; + default: + unreachable(); + } + + return val; +} + bool vgic_v3_handle_cpuif_access(struct cpu_user_regs *regs, const union hsr hsr) { bool ret = 0; -- 2.14.1 _______________________________________________ Xen-devel mailing list [email protected] https://lists.xenproject.org/mailman/listinfo/xen-devel
