On Tue, Oct 12, 2021 at 02:52:22PM +0800, Jason Wang wrote:
> This patch tries to make sure the virtio interrupt handler for INTX
> won't be called after a reset and before virtio_device_ready(). We
> can't use IRQF_NO_AUTOEN since we're using shared interrupt
> (IRQF_SHARED). So this patch tracks the INTX enabling status in a new
> intx_soft_enabled variable and toggle it during in
> vp_disable/enable_vectors(). The INTX interrupt handler will check
> intx_soft_enabled before processing the actual interrupt.
>
> Cc: Boqun Feng <[email protected]>
> Cc: Thomas Gleixner <[email protected]>
> Cc: Peter Zijlstra <[email protected]>
> Cc: Paul E. McKenney <[email protected]>
> Signed-off-by: Jason Wang <[email protected]>
> ---
> drivers/virtio/virtio_pci_common.c | 24 ++++++++++++++++++++++--
> drivers/virtio/virtio_pci_common.h | 1 +
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/virtio/virtio_pci_common.c
> b/drivers/virtio/virtio_pci_common.c
> index 0b9523e6dd39..5ae6a2a4eb77 100644
> --- a/drivers/virtio/virtio_pci_common.c
> +++ b/drivers/virtio/virtio_pci_common.c
> @@ -30,8 +30,16 @@ void vp_disable_vectors(struct virtio_device *vdev)
> struct virtio_pci_device *vp_dev = to_vp_device(vdev);
> int i;
>
> - if (vp_dev->intx_enabled)
> + if (vp_dev->intx_enabled) {
> + /*
> + * The below synchronize() guarantees that any
> + * interrupt for this line arriving after
> + * synchronize_irq() has completed is guaranteed to see
> + * intx_soft_enabled == false.
> + */
> + WRITE_ONCE(vp_dev->intx_soft_enabled, false);
> synchronize_irq(vp_dev->pci_dev->irq);
> + }
>
> for (i = 0; i < vp_dev->msix_vectors; ++i)
> disable_irq(pci_irq_vector(vp_dev->pci_dev, i));
> @@ -43,8 +51,16 @@ void vp_enable_vectors(struct virtio_device *vdev)
> struct virtio_pci_device *vp_dev = to_vp_device(vdev);
> int i;
>
> - if (vp_dev->intx_enabled)
> + if (vp_dev->intx_enabled) {
> + disable_irq(vp_dev->pci_dev->irq);
> + /*
> + * The above disable_irq() provides TSO ordering and
> + * as such promotes the below store to store-release.
> + */
> + WRITE_ONCE(vp_dev->intx_soft_enabled, true);
> + enable_irq(vp_dev->pci_dev->irq);
> return;
> + }
>
> for (i = 0; i < vp_dev->msix_vectors; ++i)
> enable_irq(pci_irq_vector(vp_dev->pci_dev, i));
> @@ -97,6 +113,10 @@ static irqreturn_t vp_interrupt(int irq, void *opaque)
> struct virtio_pci_device *vp_dev = opaque;
> u8 isr;
>
> + /* read intx_soft_enabled before read others */
> + if (!smp_load_acquire(&vp_dev->intx_soft_enabled))
> + return IRQ_NONE;
> +
> /* reading the ISR has the effect of also clearing it so it's very
> * important to save off the value. */
> isr = ioread8(vp_dev->isr);
I don't see why we need this ordering guarantee here.
synchronize_irq above makes sure no interrupt handler
is in progress. the handler itself thus does not need
any specific order, it is ok if intx_soft_enabled is read
after, not before the rest of it.
Just READ_ONCE should be enough, and we can drop the comment.
> diff --git a/drivers/virtio/virtio_pci_common.h
> b/drivers/virtio/virtio_pci_common.h
> index a235ce9ff6a5..3c06e0f92ee4 100644
> --- a/drivers/virtio/virtio_pci_common.h
> +++ b/drivers/virtio/virtio_pci_common.h
> @@ -64,6 +64,7 @@ struct virtio_pci_device {
> /* MSI-X support */
> int msix_enabled;
> int intx_enabled;
> + bool intx_soft_enabled;
> cpumask_var_t *msix_affinity_masks;
> /* Name strings for interrupts. This size should be enough,
> * and I'm too lazy to allocate each name separately. */
> --
> 2.25.1
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