Wow, I thought I will do it alone soon. Also interested Best regards. Peter Borisenko Awesome Technologies, Ltd. http://awsmtek.com hardw...@awsmtek.com +66826684211
On Wed, Aug 24, 2022 at 2:14 PM <padmarao.beg...@microchip.com> wrote: > Hi, > > I want to add a new BSP for RISC-V-based Microchip PolarFire SoC(MPFS) > to RTEMS. > > The PolarFire SoC is the 4x 64-bit RISC-V U54 cores and a 64-bit RISC- > V > E51 monitor core SoC from Microchip. > > The new BSP is added for the U54 cores not for E51 because the E51 > moniter core is resreved for first stage bootloader (Hart Software > Services). > > This BSP supports below components: > > 4 CPU Cores (U54) > Interrupt controller (PLIC) > Timer (CLINT) > UART (mmuart, 16550-compatible) > > We have already done some work on this and tested but not with latest > RTEMS source(8th March, 2022 commit) and want to send patches with > latest source. > > https://github.com/polarfire-soc/rtems/tree/mpfs-rtems > > Regards > Padmarao > _______________________________________________ > users mailing list > users@rtems.org > http://lists.rtems.org/mailman/listinfo/users >
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