Hi,
thank you for the advice on the mmu config which we missed. One has to
enable the device memory region as follows:
arm_cp15_set_translation_table_entries(device_addr_start,
device_addr_end, ARMV7_MMU_DEVICE);
Afterwards one can access the device memory as described before.
We use a nightly build of the RTEMS master, but we do not see the RTEMS
Fault Manager, as some kind of ISR prints out the content of the
register file and performs a warm reset when any error occurs. I assume
that u-boot (2018.11) and the MPU Watchdogs are in charge of this
behavior but we havn't found the point to disable it yet.
Best regards,
Christian
On 29.03.19 13:28, Sebastian Huber wrote:
Hello,
On 29/03/2019 12:57, Christian Spindeldreier wrote:
Hi,
currently we experimenting with the RTEMS-5 on a Cylcone V SoC-FPGA
using the altcycv_devkit BSP. Now we are trying to access a simple
hardware module connected to the HPS2FPGA Bridge via an AXI
interconnect. Our approach of simply write data to the corresponding
address or using the 'alt_write_word()' function which basically does
the same, results in a system crash, so i guess we are missing
something.
for this platform please use the RTEMS master and not RTEMS 4.11 or
something like that. You should first get more information about the
system crash. I would install a custom fatal error handler which
prints out the termination reason, see also
rtems_exception_frame_print(). With it you can get the exception
reason and the program counter.
I guess, the MMU is not set up to allow an access to this region:
*((volatile uint32_t *) 0xC0000000) = (uint32_t) 1UL;
alt_write_word(0xC0000000, 0x01);
--
Dipl.-Ing. Christian Spindeldreier
Leibniz University Hannover (LUH)
Institute of Microelectronic Systems
Architectures and Systems Group
Appelstr. 4, 30167 Hannover, Germany
voice : +49-511-762-5039
fax : +49-511-762-19601
mail : spindeldre...@ims.uni-hannover.de
web : http://www.ims.uni-hannover.de/spindeldreier
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