Hi Christian,
I am not familiar with the Cyclone, but we recently went through the
device tree learning curve moving to RTEMS5 and the creating a BPS for
the imx6ULL processor.
The thing with device tree is that what ever your BSP needs, is how you
have to name your device tree. Search your BSP for the following
string: fdt_
In the example cyclone BSP, there were a number of functions:
fdt_path_offset_namelen
fdt_getprop
etc.
Check how each of these calls is made, and the names used. For example
the first one I came across was in adjust_memory_size
with memory_path = "/memory" and reserved_memory_path = "/reserved-memory"
Both these need to be defined in your device tree for it to work. Look
through all your other instances and ensure that your names line up.
regards,
Ian Caddy
On 12/02/2019 11:14 pm, Christian Spindeldreier wrote:
Hi all,
we are trying to run rtems-5 on the Terasic DE10 Standard board
containing an Intel (former Altera) Cyclone V SoC-FPGA, which is
identical the the one on the one on the DK-DEV-5CSXC6N.
As there is the altcycv_devkit bsp within the rtems kernel we tried
simply to run a simple hello-world application based on this bsp.
We managed to build a u-boot image (FIT) containing rtems and a dtb
which starts to run, but freezes without any output. We assume this
issue to be related to the dtb which u-boot has to provide, but there
is no example dts within the bsp. At the moment we use a slightly
modified version of the socfpga_cyclone5_socdk device tree from the
linux-4.14 kernel working fine with the linux kernel, but this does
not seem to provide the required information for rtems.
Can someone maybe provide an example dts file, which shows how the
nodes should be named, and what information has to be provided by the
device tree? Any information on the usage of the altera-cyclone-v bsp
might be helpful.
Kind regards,
Christian
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