Also the subject says message queue and event receive but the scenario described is just about events. Events do not queue. They are one deep. If the receiving task ever misses an event send (2 sends before.one receive), then the described scenario.is expected.
--joel On Thu, Sep 20, 2018, 7:44 AM Sebastian Huber < sebastian.hu...@embedded-brains.de> wrote: > Hello Catalin, > > could you please check if you have the same behaviour on the RTEMS master. > > On ARMv-7M and RTEMS exceptions and interrupts with a priority value of > less than 0x80 are non-maskable with respect to the operating system and > therefore must not use operating system services. If you use operating > system services in non-maskable interrupts, then the system behaviour is > quite undefined. > > -- > Sebastian Huber, embedded brains GmbH > > Address : Dornierstr. 4, D-82178 Puchheim, Germany > Phone : +49 89 189 47 41-16 > Fax : +49 89 189 47 41-09 > E-Mail : sebastian.hu...@embedded-brains.de > PGP : Public key available on request. > > Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG. > > _______________________________________________ > users mailing list > users@rtems.org > http://lists.rtems.org/mailman/listinfo/users
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