Public bug reported:
[Impact]
On MediaTek MT8901 systems, Power Wrap controls power for an entire PCIe
segment shared by multiple Root Ports. PCI power management must coordinate
segment-level D3 and D0 transitions with the per-device suspend and resume
sequence.
Without this coordination, the segment may be powered down before every
managed Root Port has suspended, or PCI configuration space and controller
MMIO may be accessed before the segment returns to D0. This can cause
system-sleep or runtime-PM failures and leave PCI devices unavailable after
resume.
[Fix]
Add MediaTek Power Wrap coordination to the PCI power-management
paths.
Register eligible Root Ports under each ACPI host bridge and share one Power
Wrap controller between them. Request segment D3 only after every managed
Root Port has suspended and the tracked ports cover the complete topology.
Restore the segment to D0 before PCI resume accesses configuration space or
controller MMIO.
Apply the same ordering to runtime PM and disable smart suspend for managed
Root Ports so that system-sleep transitions use the required Power Wrap
sequence.
[Where problems could occur]
The change affects PCI system suspend, resume, runtime PM, and PCIe
port-driver
behavior on systems using CONFIG_MTK_POWER_WRAP. Regressions could prevent
suspend or resume, leave segment power-state accounting inconsistent, or make
PCI devices such as NVMe storage, networking, or GPUs inaccessible after
resume.
** Affects: linux-nvidia-bos (Ubuntu)
Importance: Undecided
Status: New
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https://bugs.launchpad.net/bugs/2167887
Title:
[linux-nvidia]: PCI: add MediaTek Power Wrap PM coordination
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