Public bug reported:
The value of the csr-mask of the SATA PHY clock DTS node has a
wrong value resulting a kernel panic as the clock/reset is not
proper for the PHY of the SATA host controller 1. This patch
fixes the correct csr-mask value of the SATA PHY clock DTS node
for the SATA Host controller 1.
As the 'ok' is the default status of a device tree node, this patch
removes the status of the PHY clock node of SATA Host Controller 1.
The status of the clock node is handled from the firmware based on
the controller enabled/disabled by the user.
** Affects: linux (Ubuntu)
Importance: Undecided
Status: New
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https://bugs.launchpad.net/bugs/1359489
Title:
Fix the csr-mask for APM X-Gene SoC AHCI SATA PHY clock DTS node
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