02.03.09 в 19:16 scrad в своём письме писал(а):

>>>>    The fix for this problem would just to install libtool,
>>>>    if you prefer using vhdl instead of verilog...
>
> Just to say that I tried running a VHDL simulation in qucs
> (that simulates OK with Verilog netlist format) returning:
>
>     creating netlist... done.
>     running C++ conversion... done.
>     compiling functions... done.
>     compiling main... done.
>     linking...libtool: link: unable to infer tagged configuration
>
>     error:         libtool: link: specify a tag with `--tag'
>
> using:
>     ubuntu 8.10
>     qucs 0.0.14-1
>     freehdl 0.0.6-2
>     libtool 2.2.4-0ubuntu4
>     patched gvhdl with gvhdl.diff and checked that /usr/bin/gvhdl has:
>               my $libtool_options = "--mode=link --tag=CXX";
>

Just download freehdll from qucs.sourceforge.net, put it in usr/src/  
compile and install, after patch gvhdl and it's work :)


-- 
With best regards,
Vladimir N. Savchenko.

-- 
Digital simulation in qucs don't work
https://bugs.launchpad.net/bugs/291075
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