Add 1us delays in busy-wait polling loops to reduce CPU usage, minimize bus traffic, and prevent watchdog timeout during QSPI operations.
Three tight polling loops continuously check hardware status without any delay, consuming excessive CPU cycles and potentially triggering watchdog timeout on long operations. Adding small delays allows the hardware time to respond and reduces unnecessary register reads. The udelay() function includes WATCHDOG_RESET()/schedule() calls that service the watchdog, preventing system reset during extended QSPI transfers. Signed-off-by: Boon Khai Ng <[email protected]> --- drivers/spi/cadence_qspi_apb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 0d4bc685f5d..ef03b263e14 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -157,6 +157,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base) start = get_timer(0); for ( ; get_timer(start) < timeout ; ) { + udelay(1); if (CQSPI_REG_IS_IDLE(reg_base)) count++; else @@ -728,6 +729,7 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_priv *priv, rxbuf += bytes_to_read; remaining -= bytes_to_read; bytes_to_read = cadence_qspi_get_rd_sram_level(priv); + udelay(1); } } @@ -898,6 +900,7 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv, bb_txbuf += write_bytes; remaining -= write_bytes; + udelay(1); } /* Check indirect done status */ -- 2.43.7
