The MT7622 infracfg and pericfg drivers both use
mtk_common_clk_infrasys_init() for probe, which populates struct
mtk_clk_priv and stores gate definitions in the clk_tree. However,
both drivers were incorrectly wired to mtk_clk_gate_ops which expects
struct mtk_cg_priv with separately populated gates/num_gates/gates_offs
fields from mtk_common_clk_gate_init().

Since those fields were never set, any attempt to enable an infracfg or
pericfg gate clock (e.g. CLK_INFRA_TRNG) would fail with -EINVAL.

Switch both to mtk_clk_infrasys_ops and struct mtk_clk_priv to match
the init function.

Fixes: 72ab603b201 ("clk: mediatek: add driver for MT7622")
Signed-off-by: Daniel Golle <[email protected]>
---
 drivers/clk/mediatek/clk-mt7622.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt7622.c 
b/drivers/clk/mediatek/clk-mt7622.c
index 782eb14e9c5..c1cc57f2e8c 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -821,8 +821,8 @@ U_BOOT_DRIVER(mtk_clk_infracfg) = {
        .id = UCLASS_CLK,
        .of_match = mt7622_infracfg_compat,
        .probe = mt7622_infracfg_probe,
-       .priv_auto      = sizeof(struct mtk_cg_priv),
-       .ops = &mtk_clk_gate_ops,
+       .priv_auto      = sizeof(struct mtk_clk_priv),
+       .ops = &mtk_clk_infrasys_ops,
        .flags = DM_FLAG_PRE_RELOC,
 };
 
@@ -831,8 +831,8 @@ U_BOOT_DRIVER(mtk_clk_pericfg) = {
        .id = UCLASS_CLK,
        .of_match = mt7622_pericfg_compat,
        .probe = mt7622_pericfg_probe,
-       .priv_auto      = sizeof(struct mtk_cg_priv),
-       .ops = &mtk_clk_gate_ops,
+       .priv_auto      = sizeof(struct mtk_clk_priv),
+       .ops = &mtk_clk_infrasys_ops,
        .flags = DM_FLAG_PRE_RELOC,
 };
 
-- 
2.53.0

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