Add STM32MP21 support which is an application processors (STM32 MPUs) based on a single Arm Cortex®-A35 core running up to 1.5 GHz and Cortex®-M33 core running at 300 MHz.
More details available at: https://www.st.com/en/microcontrollers-microprocessors/stm32mp2-series.html This series adds STM32MP21x machine, clock and reset drivers and update cmd_stm32key, mmu, rifsc, syscon for STM32MP21 support. Signed-off-by: Patrice Chotard <[email protected]> --- Patrice Chotard (7): clk: stm32mp21: Add clock driver support reset: stm32mp21: add stm32mp21 reset driver stm32mp: syscon: Add STM32MP21 support stm32mp: cmd_stm32key: add support of STM32MP21x ARM: stm32mp: Add STM32MP21 support ARM: dts: stm32: Add stm32mp215f-dk-u-boot ARM: dts: stm32: Add bootph-all in stm32mp215f-dk-u-boot.dtsi arch/arm/dts/stm32mp215f-dk-u-boot.dtsi | 19 + arch/arm/mach-stm32mp/Kconfig | 27 + arch/arm/mach-stm32mp/Kconfig.21x | 37 ++ arch/arm/mach-stm32mp/Makefile | 3 +- arch/arm/mach-stm32mp/cmd_stm32key.c | 70 +-- arch/arm/mach-stm32mp/include/mach/stm32.h | 12 +- arch/arm/mach-stm32mp/include/mach/sys_proto.h | 22 + arch/arm/mach-stm32mp/stm32mp2/Makefile | 1 + arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c | 2 + arch/arm/mach-stm32mp/stm32mp2/cpu.c | 2 + arch/arm/mach-stm32mp/stm32mp2/rifsc.c | 1 + arch/arm/mach-stm32mp/stm32mp2/stm32mp21x.c | 192 +++++++ arch/arm/mach-stm32mp/syscon.c | 1 + board/st/common/Kconfig | 2 +- board/st/stm32mp2/Kconfig | 14 + configs/stm32mp21_defconfig | 78 +++ drivers/clk/stm32/Kconfig | 9 + drivers/clk/stm32/Makefile | 1 + drivers/clk/stm32/clk-stm32mp21.c | 709 +++++++++++++++++++++++++ drivers/reset/stm32/Kconfig | 7 + drivers/reset/stm32/Makefile | 1 + drivers/reset/stm32/stm32-reset-mp21.c | 136 +++++ include/configs/stm32mp21_common.h | 126 +++++ include/configs/stm32mp21_st_common.h | 51 ++ include/stm32mp21_rcc.h | 651 +++++++++++++++++++++++ 25 files changed, 2135 insertions(+), 39 deletions(-) --- base-commit: 66891ffb14920e35abfafcae795cf4604de6682f change-id: 20260203-upstream_add_stm32mp21_support-0b0ed074dda9 Best regards, -- Patrice Chotard <[email protected]>
