On Sep 05, 2025 at 13:48:53 +0530, Anshul Dalal wrote: > U-Boot's provided enable_caches enforces the following sequence: > icache_enable -> mmu_setup (as part of dcache_enable) -> dcache_enable > > Whereas for K3 devices, we would like to add entries to the provided > static array (k3_mem_map) as per gd->bd->bi_dram and then call mmu_setup > to configure the MMU but also create carveouts for TFA/TEE before we > enable caches to prevent speculative accesses to the region. Thus the > following desired sequence: > > add dram banks -> mmu_setup -> carveout TFA/TEE -> icache/dcache enable > > Therefore this patch adds K3's own implementation of enable_cache for > ARM64, allowing for greater control over the cache enablement sequence. > > Signed-off-by: Anshul Dalal <[email protected]> > --- > arch/arm/mach-k3/common.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c > index f8c53b286eb..9d6c6fea451 100644 > --- a/arch/arm/mach-k3/common.c > +++ b/arch/arm/mach-k3/common.c > @@ -258,6 +258,12 @@ void board_prep_linux(struct bootm_headers *images) > ROUND(images->os.end, > CONFIG_SYS_CACHELINE_SIZE)); > } > + > +void enable_caches(void) > +{ > + icache_enable(); > + dcache_enable(); > +}
Reviewed-by: Dhruva Gole <[email protected]> -- Best regards, Dhruva Gole Texas Instruments Incorporated
