On 7/7/25 06:37, Venkatesh Yadav Abbarapu wrote:
Legacy SPI flash devices used a 24-bit (3-byte) addressing scheme, limiting the addressable memory to 16 MB. To support larger densities (256 Mbit and higher), extended addressing schemes, such as 32-bit (4-byte) addressing, were introduced. If the flash density exceeds 16 MB and CONFIG_SPI_FLASH_BAR is disabled, the device will use a 4-byte addressing mode. Signed-off-by: Prasad Kummari <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> --- configs/xilinx_zynqmp_virt_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 7807f6240e3..3d6ffd87af1 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -163,7 +163,6 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ARASAN=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_MAX_CHIPS=2 -CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y
Applied. M
