Hi,
On 5/12/25 19:21, Marek Vasut wrote:
Factor out common parts of STM32MP15xx DRAM controller configuration DT
description into stm32mp1-ddr.dtsi and introduce stm32mp13-ddr.dtsi which
describes STM32MP13xx DRAM controller configuration in DT.
Signed-off-by: Marek Vasut <[email protected]>
---
Cc: Cheick Traore <[email protected]>
Cc: Fabrice Gasnier <[email protected]>
Cc: Gatien Chevallier <[email protected]>
Cc: Lionel Debieve <[email protected]>
Cc: Pascal Zimmermann <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Sughosh Ganu <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
arch/arm/dts/stm32mp1-ddr.dtsi | 187 ++++++++++++++++++++++++++++++++
arch/arm/dts/stm32mp13-ddr.dtsi | 49 +++++++++
arch/arm/dts/stm32mp15-ddr.dtsi | 170 +----------------------------
3 files changed, 237 insertions(+), 169 deletions(-)
create mode 100644 arch/arm/dts/stm32mp1-ddr.dtsi
create mode 100644 arch/arm/dts/stm32mp13-ddr.dtsi
....
diff --git a/arch/arm/dts/stm32mp13-ddr.dtsi b/arch/arm/dts/stm32mp13-ddr.dtsi
new file mode 100644
index 00000000000..30d8c5014e0
--- /dev/null
+++ b/arch/arm/dts/stm32mp13-ddr.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
For new STM32MP file avoids to use the Deprecated License Identifiers
(GPL-2.0+ / GPL-2.0)
reference=
+https://spdx.dev/learn/handling-license-info/
+ https://spdx.org/licenses/
=>
SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright : STMicroelectronics 2018
This copyright, with year 2018 is strange this file is copied for TF-A
file, I think = ./fdts/stm32mp13-ddr.dtsi
Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+ */
+#ifdef CONFIG_SPL
+&ddr {
+ clocks = <&rcc AXIDCG>,
+ <&rcc DDRC1>,
+ <&rcc DDRPHYC>,
+ <&rcc DDRCAPB>,
+ <&rcc DDRPHYCAPB>;
+
+ clock-names = "axidcg",
+ "ddrc1",
+ "ddrphyc",
+ "ddrcapb",
+ "ddrphycapb";
+
+ config-DDR_MEM_COMPATIBLE {
+ st,ctl-perf = <
+ DDR_SCHED
+ DDR_SCHED1
+ DDR_PERFHPR1
+ DDR_PERFLPR1
+ DDR_PERFWR1
+ DDR_PCFGR_0
+ DDR_PCFGW_0
+ DDR_PCFGQOS0_0
+ DDR_PCFGQOS1_0
+ DDR_PCFGWQOS0_0
+ DDR_PCFGWQOS1_0
+ >;
+
+ st,phy-reg = <
+ DDR_PGCR
+ DDR_ACIOCR
+ DDR_DXCCR
+ DDR_DSGCR
+ DDR_DCR
+ DDR_ODTCR
+ DDR_ZQ0CR1
+ DDR_DX0GCR
+ DDR_DX1GCR
+ >;
+ };
+};
+#endif
+
+#include "stm32mp1-ddr.dtsi"
...
Witth the minor updates
Reviewed-by: Patrick Delaunay <[email protected]>
Thanks
Patrick
