On 3/13/25 13:23, Michal Simek wrote:
Add useful default debug uart values for all Versal platforms to simplify and speed up debug uart enabling. The similar change has been done for Zynq/ZynqMP by commit ad55d99e3cc3 ("serial: Setup serial base and freq for zynq/zynqmp"). Signed-off-by: Michal Simek <[email protected]> --- drivers/serial/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index c4f4a8d78df1..cb5fdc8711d0 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -519,6 +519,8 @@ config DEBUG_UART_BASE default 0x0 if DEBUG_UART_SANDBOX default 0xff000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQMP default 0xe0000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQ + default 0xff000000 if DEBUG_UART_PL011 && ARCH_VERSAL + default 0xf1920000 if DEBUG_UART_PL011 && (ARCH_VERSAL_NET || ARCH_VERSAL2) help This is the base address of your UART for memory-mapped UARTs.@@ -554,6 +556,7 @@ config DEBUG_UART_CLOCKdefault 0 if DEBUG_MVEBU_A3700_UART default 100000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQMP default 50000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQ + default 100000000 if DEBUG_UART_PL011 && (ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2) help The UART input clock determines the speed of the internal UART circuitry. The baud rate is derived from this by dividing the input
Applied. M
