On 8/13/24 00:07, Sean Anderson wrote:
Set NIDEN, enabling non-invasive debug for the CCI-400 PMU. Otherwise,
the PMU is effectively disabled.
Signed-off-by: Sean Anderson <[email protected]>
---
arch/arm/mach-zynqmp/include/mach/hardware.h | 3 +++
board/xilinx/zynqmp/zynqmp.c | 4 ++++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h
b/arch/arm/mach-zynqmp/include/mach/hardware.h
index f1514d6a869..51eab3509b8 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -128,6 +128,9 @@ struct crfapb_regs {
#define crfapb_base ((struct crfapb_regs *)ZYNQMP_CRF_APB_BASEADDR)
+#define ZYNQMP_CCI_REG_CCI_MISC_CTRL 0xFD5E0040
Normally this should be described via structure but some time ago also macro can
be used that's why I am fine with it.
+#define ZYNQMP_CCI_REG_CCI_MISC_CTRL_NIDEN BIT(1)
+
#define ZYNQMP_APU_BASEADDR 0xFD5C0000
struct apu_regs {
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 94a66684af2..e0ff2607952 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -76,6 +76,10 @@ int __maybe_unused psu_uboot_init(void)
writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR);
writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR + 4);
+ /* Enable CCI PMU events */
+ writel(ZYNQMP_CCI_REG_CCI_MISC_CTRL_NIDEN,
+ ZYNQMP_CCI_REG_CCI_MISC_CTRL);
+
/* Delay is required for clocks to be propagated */
udelay(1000000);
--
2.35.1.1320.gc452695387.dirty
Reviewed-by: Michal Simek <[email protected]>
Thanks,
Michal
