On Tue, 20 Aug 2024 15:27:36 +0800, Billy Tsai wrote: > In the 7th generation of the SoC from Aspeed, the control logic of the > GPIO controller has been updated to support per-pin control. Each pin now > has its own 32-bit register, allowing for individual control of the pin’s > value, direction, interrupt type, and other settings. > >
Applied to u-boot/next, thanks! -- Tom
