From: Jernej Skrabec <[email protected]> Adjust H616 LPDDR3 DRAM settings to be in line with vendor driver.
Signed-off-by: Jernej Skrabec <[email protected]> Tested-by: Chris Morgan <[email protected]> --- arch/arm/mach-sunxi/dram_sun50i_h616.c | 2 +- arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c index 37c139e0ee..a20264d8b4 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c @@ -945,7 +945,7 @@ static bool mctl_phy_init(const struct dram_para *para, val = para->tpr6 & 0xff; break; case SUNXI_DRAM_TYPE_LPDDR3: - val = para->tpr6 >> 8 & 0xff; + val = para->tpr6 >> 16 & 0xff; break; case SUNXI_DRAM_TYPE_LPDDR4: val = para->tpr6 >> 24 & 0xff; diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c index ce2ffa7a02..82b86084a6 100644 --- a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c +++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c @@ -24,8 +24,8 @@ void mctl_set_timing_params(const struct dram_para *para) u8 trrd = max(ns_to_t(6), 4); u8 trcd = ns_to_t(24); u8 trc = ns_to_t(70); - u8 txp = max(ns_to_t(8), 3); u8 trtp = max(ns_to_t(8), 2); + u8 txp = trtp; u8 trp = ns_to_t(27); u8 tras = ns_to_t(41); u16 trefi = ns_to_t(7800) / 64; -- 2.34.1
