On Thu, Mar 16, 2023 at 12:25:15PM -0500, Scott Cheloha wrote:
> This code has been dead since we switched sparc64 to clockintr several
> months ago. Nobody has come forward asking for a timer(4/sparc64)
> intrclock.
>
> As of now, you need %TICK_CMPR or %STICK_CMPR to run OpenBSD on
> sparc64. The only machines maybe lacking these registers are certain
> early HAL/Fujitsu models like SPARC64 I and II, and maybe SPARC64 III.
>
> We can remove the driver now or wait until after unlock.
>
> The driver implementation is mixed into sparc64/clock.c. I think I
> got everything, but I'm not positive.
I would just wait until after unlock. ok mlarkin for removing dead code
once unlock happens.
>
> Index: distrib/sets/lists/man/mi
> ===================================================================
> RCS file: /cvs/src/distrib/sets/lists/man/mi,v
> retrieving revision 1.1695
> diff -u -p -r1.1695 mi
> --- distrib/sets/lists/man/mi 14 Mar 2023 04:51:34 -0000 1.1695
> +++ distrib/sets/lists/man/mi 16 Mar 2023 17:18:43 -0000
> @@ -1979,7 +1979,6 @@
> ./usr/share/man/man4/sparc64/spif.4
> ./usr/share/man/man4/sparc64/ssm.4
> ./usr/share/man/man4/sparc64/tda.4
> -./usr/share/man/man4/sparc64/timer.4
> ./usr/share/man/man4/sparc64/tvtwo.4
> ./usr/share/man/man4/sparc64/upa.4
> ./usr/share/man/man4/sparc64/uperf.4
> Index: share/man/man4/man4.sparc64/Makefile
> ===================================================================
> RCS file: /cvs/src/share/man/man4/man4.sparc64/Makefile,v
> retrieving revision 1.82
> diff -u -p -r1.82 Makefile
> --- share/man/man4/man4.sparc64/Makefile 25 Apr 2019 16:47:56 -0000
> 1.82
> +++ share/man/man4/man4.sparc64/Makefile 16 Mar 2023 17:18:43 -0000
> @@ -9,7 +9,7 @@ MAN= agten.4 apio.4 asio.4 audioce.4 aud
> pcons.4 pmc.4 power.4 ppm.4 prtc.4 psycho.4 pyro.4 qe.4 qec.4 \
> radeonfb.4 raptor.4 rfx.4 \
> sab.4 sbbc.4 schizo.4 spif.4 ssm.4 \
> - tda.4 timer.4 tvtwo.4 upa.4 uperf.4 \
> + tda.4 tvtwo.4 upa.4 uperf.4 \
> vbus.4 vcc.4 vcons.4 vds.4 vdsk.4 vigra.4 vldc.4 vnet.4 vpci.4 \
> vrng.4 vrtc.4 vsw.4 \
> xbox.4 zs.4 zx.4
> Index: share/man/man4/man4.sparc64/timer.4
> ===================================================================
> RCS file: share/man/man4/man4.sparc64/timer.4
> diff -N share/man/man4/man4.sparc64/timer.4
> --- share/man/man4/man4.sparc64/timer.4 31 May 2007 19:19:57 -0000
> 1.2
> +++ /dev/null 1 Jan 1970 00:00:00 -0000
> @@ -1,43 +0,0 @@
> -.\" $OpenBSD: timer.4,v 1.2 2007/05/31 19:19:57 jmc Exp $
> -.\"
> -.\" Copyright (c) 2004 Jason L. Wright (ja...@thought.net)
> -.\" All rights reserved.
> -.\"
> -.\" Redistribution and use in source and binary forms, with or without
> -.\" modification, are permitted provided that the following conditions
> -.\" are met:
> -.\" 1. Redistributions of source code must retain the above copyright
> -.\" notice, this list of conditions and the following disclaimer.
> -.\" 2. Redistributions in binary form must reproduce the above copyright
> -.\" notice, this list of conditions and the following disclaimer in the
> -.\" documentation and/or other materials provided with the distribution.
> -.\"
> -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
> -.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> -.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> -.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
> -.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> -.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> -.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
> -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
> -.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
> -.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
> -.\" POSSIBILITY OF SUCH DAMAGE.
> -.\"
> -.Dd $Mdocdate: May 31 2007 $
> -.Dt TIMER 4 sparc64
> -.Os
> -.Sh NAME
> -.Nm timer
> -.Nd SPARC64 Timer
> -.Sh SYNOPSIS
> -.Cd "timer* at mainbus0"
> -.Sh DESCRIPTION
> -The
> -.Nm
> -device provides support for the onboard timer on SBus based
> -UltraSPARC machines.
> -The timers are used to control various time services in the
> -kernel and are not user accessible.
> -.Sh SEE ALSO
> -.Xr intro 4
> Index: sys/arch/sparc64/conf/GENERIC
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/conf/GENERIC,v
> retrieving revision 1.322
> diff -u -p -r1.322 GENERIC
> --- sys/arch/sparc64/conf/GENERIC 2 Jan 2022 23:14:27 -0000 1.322
> +++ sys/arch/sparc64/conf/GENERIC 16 Mar 2023 17:18:43 -0000
> @@ -342,9 +342,6 @@ clkbrd* at fhc?
> ## PROM clock -- if all else failse
> prtc0 at mainbus0
>
> -## Timer chip found on (some) sun4u systems.
> -timer* at mainbus0
> -
> # Virtual devices for sun4v systems.
> vcons0 at vbus?
> vrtc0 at vbus?
> Index: sys/arch/sparc64/conf/RAMDISK
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/conf/RAMDISK,v
> retrieving revision 1.126
> diff -u -p -r1.126 RAMDISK
> --- sys/arch/sparc64/conf/RAMDISK 15 Jul 2021 15:37:55 -0000 1.126
> +++ sys/arch/sparc64/conf/RAMDISK 16 Mar 2023 17:18:43 -0000
> @@ -111,7 +111,6 @@ clock* at sbus? # Mostek clock
> clock* at ebus?
> clock0 at fhc?
> rtc* at ebus? # DS1287/M5819 clock
> -timer* at mainbus0 # Timer chip
>
> vcons0 at vbus?
> vrtc0 at vbus?
> Index: sys/arch/sparc64/conf/RAMDISKU1
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/conf/RAMDISKU1,v
> retrieving revision 1.25
> diff -u -p -r1.25 RAMDISKU1
> --- sys/arch/sparc64/conf/RAMDISKU1 2 Apr 2020 06:07:05 -0000 1.25
> +++ sys/arch/sparc64/conf/RAMDISKU1 16 Mar 2023 17:18:43 -0000
> @@ -23,7 +23,6 @@ cpu0 at mainbus0
>
> sbus* at mainbus0 # Ultra 1
> clock* at sbus? # Mostek clock
> -timer* at mainbus0 # Timer chip
>
> le* at sbus? # Lance Ethernet - AMD7990
> ledma* at sbus?
> Index: sys/arch/sparc64/conf/RAMDISKU5
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/conf/RAMDISKU5,v
> retrieving revision 1.22
> diff -u -p -r1.22 RAMDISKU5
> --- sys/arch/sparc64/conf/RAMDISKU5 2 Apr 2020 06:07:05 -0000 1.22
> +++ sys/arch/sparc64/conf/RAMDISKU5 16 Mar 2023 17:18:43 -0000
> @@ -38,8 +38,6 @@ clock* at ebus?
>
> pcons0 at mainbus0 # PROM console
>
> -timer* at mainbus0 # Timer chip (some systems)
> -
> pciide* at pci? flags 0x0000
> wd* at pciide? flags 0x0a00
> atapiscsi* at pciide?
> Index: sys/arch/sparc64/sparc64/clock.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/sparc64/clock.c,v
> retrieving revision 1.76
> diff -u -p -r1.76 clock.c
> --- sys/arch/sparc64/sparc64/clock.c 4 Feb 2023 19:19:37 -0000 1.76
> +++ sys/arch/sparc64/sparc64/clock.c 16 Mar 2023 17:18:44 -0000
> @@ -207,26 +207,12 @@ const struct cfattach clock_fhc_ca = {
> extern todr_chip_handle_t todr_handle;
> static struct idprom *idprom;
>
> -static int timermatch(struct device *, void *, void *);
> -static void timerattach(struct device *, struct device *, void *);
> -
> -struct timerreg_4u timerreg_4u; /* XXX - need more cleanup */
> -
> -const struct cfattach timer_ca = {
> - sizeof(struct device), timermatch, timerattach
> -};
> -
> -struct cfdriver timer_cd = {
> - NULL, "timer", DV_DULL
> -};
> -
> int clock_bus_wenable(struct todr_chip_handle *, int);
> struct chiptime;
> void myetheraddr(u_char *);
> struct idprom *getidprom(void);
> int chiptotime(int, int, int, int, int, int);
> void timetochip(struct chiptime *);
> -void stopcounter(struct timer_4u *);
>
> int timerblurb = 10; /* Guess a value; used before clock is attached */
>
> @@ -458,68 +444,6 @@ getidprom(void)
> return (NULL);
> }
> return (idp);
> -}
> -
> -/*
> - * The sun4u OPENPROMs call the timer the "counter-timer", except for
> - * the lame UltraSPARC IIi PCI machines that don't have them.
> - */
> -static int
> -timermatch(struct device *parent, void *cf, void *aux)
> -{
> -#ifndef MULTIPROCESSOR
> - struct mainbus_attach_args *ma = aux;
> -
> - if (!timerreg_4u.t_timer || !timerreg_4u.t_clrintr)
> - return (strcmp("counter-timer", ma->ma_name) == 0);
> - else
> -#endif
> - return (0);
> -}
> -
> -static void
> -timerattach(struct device *parent, struct device *self, void *aux)
> -{
> -#if 0
> - struct mainbus_attach_args *ma = aux;
> - u_int *va = ma->ma_address;
> -
> - /*
> - * What we should have are 3 sets of registers that reside on
> - * different parts of SYSIO or PSYCHO. We'll use the prom
> - * mappings cause we can't get rid of them and set up appropriate
> - * pointers on the timerreg_4u structure.
> - */
> - timerreg_4u.t_timer = (struct timer_4u *)(u_long)va[0];
> - timerreg_4u.t_clrintr = (int64_t *)(u_long)va[1];
> - timerreg_4u.t_mapintr = (int64_t *)(u_long)va[2];
> -
> - /* Install the appropriate interrupt vector here */
> - level10.ih_number = INTVEC(ma->ma_interrupts[0]);
> - level10.ih_clr = (void *)&timerreg_4u.t_clrintr[0];
> - level10.ih_map = (void *)&timerreg_4u.t_mapintr[0];
> - strlcpy(level10.ih_name, "clock", sizeof(level10.ih_name));
> - intr_establish(10, &level10);
> -
> - level14.ih_number = INTVEC(ma->ma_interrupts[1]);
> - level14.ih_clr = (void *)&timerreg_4u.t_clrintr[1];
> - level14.ih_map = (void *)&timerreg_4u.t_mapintr[1];
> - strlcpy(level14.ih_name, "prof", sizeof(level14.ih_name));
> - intr_establish(14, &level14);
> -
> - printf(" ivec 0x%llx, 0x%llx\n", INTVEC(level10.ih_number),
> - INTVEC(level14.ih_number));
> -#endif
> - printf("\n");
> -}
> -
> -void
> -stopcounter(struct timer_4u *creg)
> -{
> - /* Stop the clock */
> - volatile int discard;
> - discard = creg->t_limit;
> - creg->t_limit = 0;
> }
>
> /*
> Index: sys/arch/sparc64/sparc64/timerreg.h
> ===================================================================
> RCS file: sys/arch/sparc64/sparc64/timerreg.h
> diff -N sys/arch/sparc64/sparc64/timerreg.h
> --- sys/arch/sparc64/sparc64/timerreg.h 29 May 2007 09:54:23 -0000
> 1.5
> +++ /dev/null 1 Jan 1970 00:00:00 -0000
> @@ -1,87 +0,0 @@
> -/* $OpenBSD: timerreg.h,v 1.5 2007/05/29 09:54:23 sobrado Exp $ */
> -/* $NetBSD: timerreg.h,v 1.3 1999/06/05 05:10:01 mrg Exp $ */
> -
> -/*
> - * Copyright (c) 1992, 1993
> - * The Regents of the University of California. All rights reserved.
> - *
> - * This software was developed by the Computer Systems Engineering group
> - * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
> - * contributed to Berkeley.
> - *
> - * All advertising materials mentioning features or use of this software
> - * must display the following acknowledgement:
> - * This product includes software developed by the University of
> - * California, Lawrence Berkeley Laboratory.
> - *
> - * Redistribution and use in source and binary forms, with or without
> - * modification, are permitted provided that the following conditions
> - * are met:
> - * 1. Redistributions of source code must retain the above copyright
> - * notice, this list of conditions and the following disclaimer.
> - * 2. Redistributions in binary form must reproduce the above copyright
> - * notice, this list of conditions and the following disclaimer in the
> - * documentation and/or other materials provided with the distribution.
> - * 3. Neither the name of the University nor the names of its contributors
> - * may be used to endorse or promote products derived from this software
> - * without specific prior written permission.
> - *
> - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
> - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
> - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
> - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
> - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
> - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
> - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
> - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
> - * SUCH DAMAGE.
> - *
> - * @(#)timerreg.h 8.1 (Berkeley) 6/11/93
> - */
> -
> -/*
> - * These timers work in a rather peculiar fashion. Most clock counters
> - * run to 0 (as, e.g., on the VAX, where the ICR counts up to 0 from a
> - * large unsigned number). On the Sun-4c, it counts up to a limit. But
> - * for some reason, when it reaches the limit, it resets to 1, not 0.
> - * Thus, if the limit is set to 4, the counter counts like this:
> - *
> - * 1, 2, 3, 1, 2, 3, ...
> - *
> - * and if we want to divide by N we must set the limit register to N+1.
> - *
> - * Sun-4u counters/timer are similar but:
> - *
> - * - the registers have been shuffled around once again. We need
> - * to use offsets from the 3 addresses the ROM provides us.
> - * - The counters are 29 bits wide with 1us accuracy.
> - * - You can make them do funky things with the limit register
> - * - They have standard 64-bit SBus control registers.
> - *
> - * There is a problem on the Ultra5 and Ultra10. As the PCI controller
> - * doesn't include the timer, there are no `counter-timer' nodes here
> - * and so we must use %tick.
> - */
> -#ifndef _LOCORE
> -struct timer_4u {
> - volatile int64_t t_count; /* counter reg */
> - volatile int64_t t_limit; /* limit reg */
> -
> -#define TMR_LIM_IEN 0x80000000 /* interrupt enable bit */
> -#define TMR_LIM_RELOAD 0x40000000 /* reload counter to 0
> */
> -#define TMR_LIM_PERIODIC 0x20000000 /* reset at limit */
> -#define TMR_LIM_MASK 0x1fffffff
> -};
> -
> -struct timerreg_4u {
> - struct timer_4u *t_timer; /* There are two of them. */
> - volatile int64_t *t_clrintr; /* There are two of these. */
> - volatile int64_t *t_mapintr; /* Same here. */
> -};
> -
> -#endif /* _LOCORE */
> -
> -/* Compute a limit that causes the timer to fire every n microseconds. */
> -#define tmr_ustolim(n) (((n) - 1) & TMR_LIM_MASK)
>
