Mike Larkin <mlar...@nested.page> writes:
> This lock/unlock around an atomic operation was causing delays delivering
> interupts into VMs. Pointed out by claudio@ when he ran md5 -tttt in a VM
> and it became very sluggish.
>
> Debugging help from dlg and mpi, thanks.
>
> ok?
>
ok dv@. This is overly defensive and from the time I was chasing issues
on Intel hosts. Now that the VMCS is properly protected this can go.
Removing the lock here speeds up booting my Ubuntu iso 10x, too 8)
> -ml
>
>
> Index: arch/amd64/amd64/vmm.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/amd64/amd64/vmm.c,v
> retrieving revision 1.326
> diff -u -p -a -u -r1.326 vmm.c
> --- arch/amd64/amd64/vmm.c 7 Nov 2022 12:29:12 -0000 1.326
> +++ arch/amd64/amd64/vmm.c 8 Nov 2022 15:29:10 -0000
> @@ -894,9 +894,7 @@ vm_intr_pending(struct vm_intr_params *v
> goto out;
> }
>
> - rw_enter_write(&vcpu->vc_lock);
> vcpu->vc_intr = vip->vip_intr;
> - rw_exit_write(&vcpu->vc_lock);
>
> refcnt_rele_wake(&vcpu->vc_refcnt);
> out:
> @@ -3526,7 +3524,7 @@ vcpu_reset_regs_vmx(struct vcpu *vcpu, s
> vmx_setmsrbrw(vcpu, MSR_FSBASE);
> vmx_setmsrbrw(vcpu, MSR_GSBASE);
> vmx_setmsrbrw(vcpu, MSR_KERNELGSBASE);
> -
> +
> vmx_setmsrbr(vcpu, MSR_MISC_ENABLE);
> vmx_setmsrbr(vcpu, MSR_TSC);
>
> Index: arch/amd64/include/vmmvar.h
> ===================================================================
> RCS file: /cvs/src/sys/arch/amd64/include/vmmvar.h,v
> retrieving revision 1.81
> diff -u -p -a -u -r1.81 vmmvar.h
> --- arch/amd64/include/vmmvar.h 1 Sep 2022 22:01:40 -0000 1.81
> +++ arch/amd64/include/vmmvar.h 8 Nov 2022 15:29:10 -0000
> @@ -937,7 +937,7 @@ struct vcpu {
> struct cpu_info *vc_last_pcpu; /* [v] */
> struct vm_exit vc_exit; /* [v] */
>
> - uint16_t vc_intr; /* [v] */
> + uint16_t vc_intr; /* [a] */
> uint8_t vc_irqready; /* [v] */
>
> uint8_t vc_fpuinited; /* [v] */
