> On Jul 6, 2022, at 11:36 AM, Mike Larkin <mlar...@nested.page> wrote: > > On Tue, Jul 05, 2022 at 07:16:26PM -0500, Scott Cheloha wrote: >> On Tue, Jul 05, 2022 at 01:38:32PM -0700, Mike Larkin wrote: >>> On Mon, Jul 04, 2022 at 09:06:55PM -0500, Scott Cheloha wrote: >>>> >>>> [...] >>> >>> Here's the output from a 4 socket 80 thread machine. >> >> Oh nice. I think this is the biggest machine we've tried so far. >> >>> kern.timecounter reports tsc after boot. >> >> Excellent. >> >>> Looks like this machine doesn't have the adjust MSR? >> >> IA32_TSC_ADJUST first appears in the Intel SDM Vol. 3 some time in >> 2011 or 2012. I can't find the exact revision. >> >> (I really wish there was a comprehensive version history for this sort >> of thing, i.e. this MSR first appeared in the blah-blah uarch, this >> instruction is available on all uarchs after yada-yada, etc.) >> >> There are apparently several versions of the E7-4870 in the E7 >> "family". If your CPU predates that, or launched 2012-2014, the MSR >> may not have made the cut. >> >> An aside: I cannot find any evidence of AMD supporting this MSR in any >> processor. It would be really, really nice if they did. If you (or >> anyone reading) knows anything about this, or whether they have an >> equivalent MSR, shout it out. >> >>> Other than that, machine seems stable. >> >> Good, glad to hear it. Thank you for testing. >> >> Has this machine had issues using the TSC on -current in the past? >> >> (If you have the time) what does the dmesg look like on the -current >> kernel with TSC_DEBUG enabled? > > Looks like you enabled TSC_DEBUG in your diff, so what I sent you is what you > are asking for...?
No, I mean on the -current *unpatched* kernel. Sorry if that wasn't clear. Our -current kernel prints more detailed information if TSC_DEBUG is enabled. In particular, I'm curious if the unpatched kernel detects any skew or drift on your machine, and if so, how much.
