Hi

There are more undefined behaviour reports in our network drivers

kubsan: dev/pci/if_em_hw.c:7625:38: shift: left shift of 65535 by 16 places 
cannot be represented in type 'int'
kubsan: dev/pci/if_ix.c:3403:18: shift: left shift of 255 by 24 places cannot 
be represented in type 'int'
kubsan: dev/pci/if_ix.c:3404:19: shift: left shift of 131 by 24 places cannot 
be represented in type 'int'
kubsan: dev/pci/ixgbe_82598.c:547:26: signed integer overflow: 65535 * 65537 
cannot be represented in type 'int'
kubsan: dev/pci/if_ix.c:3422:19: shift: left shift of 255 by 24 places cannot 
be represented in type 'int'
kubsan: dev/pci/if_ix.c:3423:20: shift: left shift of 129 by 24 places cannot 
be represented in type 'int'
kubsan: dev/pci/ixgbe.c:2381:26: signed integer overflow: 65535 * 65537 cannot 
be represented in type 'int'

ok?

bluhm

Index: dev/pci/if_em_hw.c
===================================================================
RCS file: /data/mirror/openbsd/cvs/src/sys/dev/pci/if_em_hw.c,v
retrieving revision 1.113
diff -u -p -r1.113 if_em_hw.c
--- dev/pci/if_em_hw.c  9 Jan 2022 05:42:50 -0000       1.113
+++ dev/pci/if_em_hw.c  24 Jan 2022 17:23:25 -0000
@@ -7622,7 +7622,7 @@ em_read_part_num(struct em_hw *hw, uint3
                return -E1000_ERR_EEPROM;
        }
        /* Save word 0 in upper half of part_num */
-       *part_num = (uint32_t) (eeprom_data << 16);
+       *part_num = (uint32_t)eeprom_data << 16;
 
        /* Get word 1 from EEPROM */
        if (em_read_eeprom(hw, ++offset, 1, &eeprom_data) < 0) {
Index: dev/pci/if_ix.c
===================================================================
RCS file: /data/mirror/openbsd/cvs/src/sys/dev/pci/if_ix.c,v
retrieving revision 1.180
diff -u -p -r1.180 if_ix.c
--- dev/pci/if_ix.c     27 Jul 2021 01:44:55 -0000      1.180
+++ dev/pci/if_ix.c     24 Jan 2022 17:23:25 -0000
@@ -3400,8 +3400,8 @@ ixgbe_set_ivar(struct ix_softc *sc, uint
                        entry += (type * 64);
                index = (entry >> 2) & 0x1F;
                ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
-               ivar &= ~(0xFF << (8 * (entry & 0x3)));
-               ivar |= (vector << (8 * (entry & 0x3)));
+               ivar &= ~((uint32_t)0xFF << (8 * (entry & 0x3)));
+               ivar |= ((uint32_t)vector << (8 * (entry & 0x3)));
                IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar);
                break;
 
@@ -3413,14 +3413,14 @@ ixgbe_set_ivar(struct ix_softc *sc, uint
                if (type == -1) { /* MISC IVAR */
                        index = (entry & 1) * 8;
                        ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);
-                       ivar &= ~(0xFF << index);
-                       ivar |= (vector << index);
+                       ivar &= ~((uint32_t)0xFF << index);
+                       ivar |= ((uint32_t)vector << index);
                        IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);
                } else {        /* RX/TX IVARS */
                        index = (16 * (entry & 1)) + (8 * type);
                        ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));
-                       ivar &= ~(0xFF << index);
-                       ivar |= (vector << index);
+                       ivar &= ~((uint32_t)0xFF << index);
+                       ivar |= ((uint32_t)vector << index);
                        IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);
                }
 
Index: dev/pci/ixgbe.c
===================================================================
RCS file: /data/mirror/openbsd/cvs/src/sys/dev/pci/ixgbe.c,v
retrieving revision 1.26
diff -u -p -r1.26 ixgbe.c
--- dev/pci/ixgbe.c     2 Mar 2020 01:59:01 -0000       1.26
+++ dev/pci/ixgbe.c     24 Jan 2022 17:23:25 -0000
@@ -2378,7 +2378,7 @@ int32_t ixgbe_fc_enable_generic(struct i
        }
 
        /* Configure pause time (2 TCs per register) */
-       reg = hw->fc.pause_time * 0x00010001;
+       reg = (uint32_t)hw->fc.pause_time * 0x00010001;
        for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++)
                IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);
 
Index: dev/pci/ixgbe_82598.c
===================================================================
RCS file: /data/mirror/openbsd/cvs/src/sys/dev/pci/ixgbe_82598.c,v
retrieving revision 1.19
diff -u -p -r1.19 ixgbe_82598.c
--- dev/pci/ixgbe_82598.c       9 Jan 2022 05:42:56 -0000       1.19
+++ dev/pci/ixgbe_82598.c       24 Jan 2022 17:23:25 -0000
@@ -544,7 +544,7 @@ int32_t ixgbe_fc_enable_82598(struct ixg
        }
 
        /* Configure pause time (2 TCs per register) */
-       reg = hw->fc.pause_time * 0x00010001;
+       reg = (uint32_t)hw->fc.pause_time * 0x00010001;
        for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++)
                IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);
 

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