Adam Steen writes:
> Hi
>
> IA32_EPT_VPID_CAP_XO_TRANSLATIONS is specified incorrectly, see the
> patch below.
Adam's diff looks correct to me based on reading Intel SDM Vol 3D,
Appendix A.10 (VPID and EPT Capabilities) [1]:
The IA32_VMX_EPT_VPID_CAP MSR (index 48CH) reports information about
the capabilities of the logical processor with regard to
virtual-processor identifiers (VPIDs, Section 28.1) and extended page
tables (EPT, Section 28.2):
* If bit 0 is read as 1, the processor supports execute-only
translations by EPT. This support allows software to configure EPT
paging-structure entries in which bits 1:0 are clear (indicating
that data accesses are not allowed) and bit 2 is set (indicating
that instruction fetches are allowed).
...
IA32_EPT_VPID_CAP_XO_TRANSLATIONS is only referenced in vmm.c.
I've updated the diff so it applies cleanly, but didn't change the name
of the capability as it's more accurate with "TRANSLATIONS" included
imo.
OK?
>
> Cheers
> Adam
>
> On Fri, Feb 26, 2021 at 01:08:17PM +0800, Adam Steen wrote:
>> Hi
>>
>> IA32_EPT_VPID_CAP_XO_TRANSLATIONS is specified as 0x0 and not (1ULL << 0)
>> ie 0 and not bit 0 as on.
>>
>> Please see the attach diff to correct this and rename
>> IA32_EPT_VPID_CAP_XO_TRANSLATIONS to IA32_EPT_VPID_CAP_XO to reduce
>> wordyness.
>>
>> Cheers
>> Adam
>>
[1]
https://software.intel.com/content/www/us/en/develop/download/intel-64-and-ia-32-architectures-sdm-volume-3d-system-programming-guide-part-4.html
-Dave
Index: sys/arch/amd64/include/specialreg.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/specialreg.h,v
retrieving revision 1.88
diff -u -p -r1.88 specialreg.h
--- sys/arch/amd64/include/specialreg.h 13 Sep 2020 05:57:28 -0000 1.88
+++ sys/arch/amd64/include/specialreg.h 27 Mar 2021 14:14:13 -0000
@@ -957,7 +957,7 @@
#define IA32_VMX_TRUE_ENTRY_CTLS 0x490
#define IA32_VMX_VMFUNC 0x491
-#define IA32_EPT_VPID_CAP_XO_TRANSLATIONS 0x0
+#define IA32_EPT_VPID_CAP_XO_TRANSLATIONS (1ULL << 0)
#define IA32_EPT_VPID_CAP_PAGE_WALK_4 (1ULL << 6)
#define IA32_EPT_VPID_CAP_WB (1ULL << 14)
#define IA32_EPT_VPID_CAP_AD_BITS (1ULL << 21)
