> Date: Mon, 15 Mar 2021 19:25:56 +0100
> From: Patrick Wildt <[email protected]>
>
> Am Mon, Mar 15, 2021 at 08:59:05AM +0100 schrieb Jan Klemkow:
> > On Mon, Mar 15, 2021 at 01:35:28AM -0600, Theo de Raadt wrote:
> > > My comments are about the "text name", which goes into every kernel
> > > anyone compiles.
> > >
> > > It should be as short as possible.
> >
> > Sorry, I missed that point.
> >
> > > But the reason why 10G is incorrect is because surely the port can
> > > accept 1G, or a variety of other SFPs... It is simply too exact,
> > > and wasting kernel bytes.
> >
> > OK?
> >
> > Thanks,
> > Jan
> >
> > Index: if_ixl.c
> > ===================================================================
> > RCS file: /cvs/src/sys/dev/pci/if_ixl.c,v
> > retrieving revision 1.73
> > diff -u -p -r1.73 if_ixl.c
> > --- if_ixl.c 26 Feb 2021 10:36:45 -0000 1.73
> > +++ if_ixl.c 15 Mar 2021 07:42:48 -0000
> > @@ -1611,6 +1611,7 @@ struct ixl_device {
> >
> > static const struct ixl_device ixl_devices[] = {
> > { &ixl_710, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_SFP },
> > + { &ixl_710, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_SFP_2 },
>
> Looks like so far we have ordered this list in the same order as it is
> in pcidevs (for X710). If we want to keep that order, _2 should be
> the first entry. If we don't want to keep that order, then this diff
> should be fine. jsg@, dlg@: any preference or do you not care?
I don't think it makes sense to make _2 the first entry.
> > { &ixl_710, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_40G_BP },
> > { &ixl_710, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_BP, },
> > { &ixl_710, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_QSFP_1 },
> > Index: pcidevs
> > ===================================================================
> > RCS file: /cvs/src/sys/dev/pci/pcidevs,v
> > retrieving revision 1.1960
> > diff -u -p -r1.1960 pcidevs
> > --- pcidevs 14 Mar 2021 01:09:29 -0000 1.1960
> > +++ pcidevs 15 Mar 2021 07:42:19 -0000
> > @@ -3702,6 +3702,7 @@ product INTEL ICH8_IGP_AMT 0x104a ICH8 I
> > product INTEL ICH8_IGP_C 0x104b ICH8 IGP C
> > product INTEL ICH8_IFE 0x104c ICH8 IFE
> > product INTEL ICH8_IGP_M 0x104d ICH8 IGP M
> > +product INTEL X710_10G_SFP_2 0x104e X710 SFP+
> > product INTEL PRO_100_VE_4 0x1050 PRO/100 VE
> > product INTEL PRO_100_VE_5 0x1051 PRO/100 VE
> > product INTEL PRO_100_VM_6 0x1052 PRO/100 VM
> > Index: pcidevs.h
> > ===================================================================
> > RCS file: /cvs/src/sys/dev/pci/pcidevs.h,v
> > retrieving revision 1.1954
> > diff -u -p -r1.1954 pcidevs.h
> > --- pcidevs.h 14 Mar 2021 01:10:35 -0000 1.1954
> > +++ pcidevs.h 15 Mar 2021 07:42:21 -0000
> > @@ -3707,6 +3707,7 @@
> > #define PCI_PRODUCT_INTEL_ICH8_IGP_C 0x104b /* ICH8 IGP C */
> > #define PCI_PRODUCT_INTEL_ICH8_IFE 0x104c /* ICH8 IFE */
> > #define PCI_PRODUCT_INTEL_ICH8_IGP_M 0x104d /* ICH8 IGP M */
> > +#define PCI_PRODUCT_INTEL_X710_10G_SFP_2 0x104e /* X710
> > SFP+ */
> > #define PCI_PRODUCT_INTEL_PRO_100_VE_4 0x1050 /* PRO/100 VE */
> > #define PCI_PRODUCT_INTEL_PRO_100_VE_5 0x1051 /* PRO/100 VE */
> > #define PCI_PRODUCT_INTEL_PRO_100_VM_6 0x1052 /* PRO/100 VM */
> > Index: pcidevs_data.h
> > ===================================================================
> > RCS file: /cvs/src/sys/dev/pci/pcidevs_data.h,v
> > retrieving revision 1.1949
> > diff -u -p -r1.1949 pcidevs_data.h
> > --- pcidevs_data.h 14 Mar 2021 01:10:35 -0000 1.1949
> > +++ pcidevs_data.h 15 Mar 2021 07:42:21 -0000
> > @@ -12252,6 +12252,10 @@ static const struct pci_known_product pc
> > "ICH8 IGP M",
> > },
> > {
> > + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_SFP_2,
> > + "X710 SFP+",
> > + },
> > + {
> > PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_4,
> > "PRO/100 VE",
> > },
> >
>
>
