On 19-06-19 07:13, Patrick Wildt wrote:
Hi,
this diff adds the necessary helpers to arm64 so that libcrypto knows
which of the hardware crypto features are available on the machine.
Those helpers are used by the existing and matching armv7 code.
ok?
Patrick
Does it make sense to query the ID_AA64PFR0_EL1 and ID_AA64ISAR0_EL1
system registers for that using the mrs instruction ?
I've only got a Linux system to play with and it's not clear to me how
to specify these registers with the mrs instruction on that system. I
resorted to encoding the instructions directly into the assembly code as
a byte sequence. I don't know if this also applies to OpenBSD.
In case you're interested, these functions seem to return reasonable
results on the one hardware board I have. It does crash on qemu though
with an "Illegal instruction" message.
.arch armv8-a
.text
.p2align 5
.globl cpuid_get_id_aa64isar0_el1
cpuid_get_id_aa64isar0_el1:
# ID_AA64ISAR0_EL1:
# op0 op1 CRn CRm op2
# 11 000 0000 0110 000
# mrs x0, ID_AA64ISAR0_EL1
# 1101 0101 0011 1000 0000 0110 0000 0000
.byte 0x00, 0x06, 0x38, 0xd5
ret
.size cpuid_get_id_aa64isar0_el1, .-cpuid_get_id_aa64isar0_el1
.type cpuid_get_id_aa64isar0_el1, @function
.text
.p2align 5
.globl cpuid_get_id_aa64pfr0_el1
cpuid_get_id_aa64pfr0_el1:
# ID_AA64PFR0_EL1:
# op0 op1 CRn CRm op2
# 11 000 0000 0100 000
# mrs x0, ID_AA64PFR0_EL1
# 1101 0101 0011 1000 0000 0100 0000 0000
.byte 0x00, 0x04, 0x38, 0xd5
ret
.size cpuid_get_id_aa64pfr0_el1, .-cpuid_get_id_aa64pfr0_el1
.type cpuid_get_id_aa64pfr0_el1, @function
