Hi,
I saw a recent commit in armv7 which fixed some KNF but added some
trailing white spaces.
I already saw some commit that removed trailing white spaces and thought
about sending a patch (actually joined here).
I usually don't send this kind of patch as it's not usually accepted:
- it doesn't do anything useful except saving a few bytes
- it modifies code history so it makes it harder to track functional
changes
I, myself, clean the useless white spaces in my code.
So here is a patch against sys/arch/armv7 that remove trailing
white spaces. When cleaning, I found an extraneous ";".
If you think it's useful, I'll submit more, by subsystems.
Here is the part of the patch which doesn't remove only spaces
(git diff -b):
diff --git a/sys/arch/armv7/omap/gptimer.c b/sys/arch/armv7/omap/gptimer.c
index e87db41106e..584a1d527ba 100644
--- a/sys/arch/armv7/omap/gptimer.c
+++ b/sys/arch/armv7/omap/gptimer.c
@@ -291,7 +291,7 @@ gptimer_cpu_initclocks()
ticks_per_intr = ticks_per_second / hz;
ticks_err_cnt = ticks_per_second % hz;
- ticks_err_sum = 0;;
+ ticks_err_sum = 0;
prcm_setclock(1, PRCM_CLK_SPEED_32);
prcm_setclock(2, PRCM_CLK_SPEED_32);
Here is the full patch:
diff --git a/sys/arch/armv7/armv7/armv7_machdep.c
b/sys/arch/armv7/armv7/armv7_machdep.c
index 11db647cfc2..5e85b0e31e8 100644
--- a/sys/arch/armv7/armv7/armv7_machdep.c
+++ b/sys/arch/armv7/armv7/armv7_machdep.c
@@ -13,7 +13,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. The name of Genetec Corporation may not be used to endorse or
+ * 3. The name of Genetec Corporation may not be used to endorse or
* promote products derived from this software without specific prior
* written permission.
*
@@ -29,7 +29,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * Machine dependant functions for kernel setup for
+ * Machine dependant functions for kernel setup for
* Intel DBPXA250 evaluation board (a.k.a. Lubbock).
* Based on iq80310_machhdep.c
*/
diff --git a/sys/arch/armv7/armv7/armv7_start.S
b/sys/arch/armv7/armv7/armv7_start.S
index 47160b5c0ac..a1dacda477a 100644
--- a/sys/arch/armv7/armv7/armv7_start.S
+++ b/sys/arch/armv7/armv7/armv7_start.S
@@ -13,7 +13,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. The name of Genetec Corporation may not be used to endorse or
+ * 3. The name of Genetec Corporation may not be used to endorse or
* promote products derived from this software without specific prior
* written permission.
*
@@ -92,9 +92,9 @@ ENTRY(hvc_call)
* omap4_smc_call - issues a secure monitor API call
* @r0: contains the monitor API number
* @r1: contains the value to set
- *
+ *
* This function will send a secure monitor call to the internal rom code
in
- * the trust mode. The rom code expects that r0 will contain the value and
+ * the trust mode. The rom code expects that r0 will contain the value and
* r12 will contain the API number, so internally the function swaps the
* register settings around. The trust mode code may also alter all the
cpu
* registers so everything (including the lr register) is saved on the
stack
diff --git a/sys/arch/armv7/include/bootconfig.h
b/sys/arch/armv7/include/bootconfig.h
index af5bea555b5..c3cde41ff44 100644
--- a/sys/arch/armv7/include/bootconfig.h
+++ b/sys/arch/armv7/include/bootconfig.h
@@ -62,7 +62,7 @@ typedef struct _BootConfig {
extern BootConfig bootconfig;
#endif /* _KERNEL || _STANDALONE */
-#if defined(_KERNEL)
+#if defined(_KERNEL)
extern char *boot_args;
extern char *boot_file;
#endif /* _KERNEL */
diff --git a/sys/arch/armv7/include/intr.h b/sys/arch/armv7/include/intr.h
index a166a17493a..865e8de102d 100644
--- a/sys/arch/armv7/include/intr.h
+++ b/sys/arch/armv7/include/intr.h
@@ -135,7 +135,7 @@ void arm_setsoftintr(int si);
#define _setsoftintr arm_setsoftintr
#include <arm/softintr.h>
-
+
void *arm_intr_establish(int irqno, int level, int (*func)(void *),
void *cookie, char *name);
void arm_intr_disestablish(void *cookie);
diff --git a/sys/arch/armv7/include/machine_reg.h
b/sys/arch/armv7/include/machine_reg.h
index 645c045091b..114a7529a2a 100644
--- a/sys/arch/armv7/include/machine_reg.h
+++ b/sys/arch/armv7/include/machine_reg.h
@@ -12,7 +12,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. The name of Genetec Corporation may not be used to endorse or
+ * 3. The name of Genetec Corporation may not be used to endorse or
* promote products derived from this software without specific prior
* written permission.
*
diff --git a/sys/arch/armv7/omap/amdisplay.c b/sys/arch/armv7/omap/amdisplay.c
index ced05666f04..7bffabd664e 100644
--- a/sys/arch/armv7/omap/amdisplay.c
+++ b/sys/arch/armv7/omap/amdisplay.c
@@ -317,7 +317,7 @@ amdisplay_attach(struct device *parent, struct device
*self, void *args)
| LCD_LCDDMA_CTRL_FRAME_MODE);
reg |= (0x4 << LCD_LCDDMA_CTRL_BURST_SIZE_SHAMT)
| LCD_LCDDMA_CTRL_FRAME_MODE;
- HWRITE4(sc, LCD_LCDDMA_CTRL, reg);
+ HWRITE4(sc, LCD_LCDDMA_CTRL, reg);
/* set framebuffer location + bounds */
HWRITE4(sc, LCD_LCDDMA_FB0, sc->sc_fb0_dma_segs[0].ds_addr);
@@ -413,16 +413,16 @@ amdisplay_intr(void *arg)
HSET4(sc, LCD_RASTER_CTRL, LCD_RASTER_CTRL_LCDEN);
}
- if (ISSET(reg, LCD_IRQ_FUF)) {
+ if (ISSET(reg, LCD_IRQ_FUF)) {
DPRINTF(15, ("%s: FIFO underflow\n", DEVNAME(sc)));
}
-
+
if (ISSET(reg, LCD_IRQ_SYNC)) {
sc->sc_flags |= LCD_RESET_PENDING;
DPRINTF(18, ("%s: sync lost\n", DEVNAME(sc)));
}
- if (ISSET(reg, LCD_IRQ_RR_DONE)) {
+ if (ISSET(reg, LCD_IRQ_RR_DONE)) {
DPRINTF(21, ("%s: frame done\n", DEVNAME(sc)));
HWRITE4(sc, LCD_LCDDMA_FB0, sc->sc_fb0_dma_segs[0].ds_addr);
HWRITE4(sc, LCD_LCDDMA_FB0_CEIL, (sc->sc_fb0_dma_segs[0].ds_addr
@@ -540,7 +540,7 @@ amdisplay_conf_crt_timings(struct amdisplay_softc *sc)
/* Lines per panel */
timing1 |= (height & 0x3ff);
- timing2 |= ((height >> 10 ) & 1)
+ timing2 |= ((height >> 10 ) & 1)
<< LCD_RASTER_TIMING_2_LPP_B10_SHAMT;
/* waveform settings */
diff --git a/sys/arch/armv7/omap/amdisplayreg.h
b/sys/arch/armv7/omap/amdisplayreg.h
index b79c3c69504..8df70a5f7bd 100644
--- a/sys/arch/armv7/omap/amdisplayreg.h
+++ b/sys/arch/armv7/omap/amdisplayreg.h
@@ -76,7 +76,7 @@
#define LCD_RASTER_SUBPANEL_HOLS (0x1 << 29)
#define LCD_RASTER_SUBPANEL_LPPT (0x2FF << 16)
#define LCD_RASTER_SUBPANEL_DPDLSB (0xFFFF << 0)
-#define LCD_RASTER_SUBPANEL_LPPT_SHAMT
+#define LCD_RASTER_SUBPANEL_LPPT_SHAMT
#define LCD_RASTER_SUBPANEL_2 0x3C
#define LCD_RASTER_SUBPANEL2_LPPT_B10 (0x1 << 8)
#define LCD_RASTER_SUBPANEL2_DPDMSB (0xFF << 0)
diff --git a/sys/arch/armv7/omap/dmtimer.c b/sys/arch/armv7/omap/dmtimer.c
index db1eb32ad23..faefe6a257f 100644
--- a/sys/arch/armv7/omap/dmtimer.c
+++ b/sys/arch/armv7/omap/dmtimer.c
@@ -280,7 +280,7 @@ dmtimer_intr(void *frame)
bus_space_read_4(sc->sc_iot, sc->sc_ioh[0], DM_TISR));
bus_space_write_4(sc->sc_iot, sc->sc_ioh[0], DM_TCRR, -duration);
dmtimer_wait(DM_TWPS_ALL);
-
+
return 1;
}
@@ -304,7 +304,7 @@ dmtimer_cpu_initclocks()
sc->sc_ticks_per_intr = sc->sc_ticks_per_second / hz;
sc->sc_ticks_err_cnt = sc->sc_ticks_per_second % hz;
- sc->sc_ticks_err_sum = 0;
+ sc->sc_ticks_err_sum = 0;
/* establish interrupts */
arm_intr_establish(sc->sc_irq, IPL_CLOCK, dmtimer_intr,
diff --git a/sys/arch/armv7/omap/gptimer.c b/sys/arch/armv7/omap/gptimer.c
index e87db41106e..584a1d527ba 100644
--- a/sys/arch/armv7/omap/gptimer.c
+++ b/sys/arch/armv7/omap/gptimer.c
@@ -111,7 +111,7 @@ void gptimer_delay(u_int);
void gptimer_setstatclockrate(int newhz);
bus_space_tag_t gptimer_iot;
-bus_space_handle_t gptimer_ioh0, gptimer_ioh1;
+bus_space_handle_t gptimer_ioh0, gptimer_ioh1;
int gptimer_irq = 0;
u_int gptimer_get_timecount(struct timecounter *);
@@ -177,7 +177,7 @@ gptimer_attach(struct device *parent, struct device *self,
void *args)
gptimer_setstatclockrate, NULL);
}
-/*
+/*
* See comment in arm/xscale/i80321_clock.c
*
* counter is count up, but with autoreload timers it is not possible
@@ -268,7 +268,7 @@ gptimer_intr(void *frame)
bus_space_read_4(gptimer_iot, gptimer_ioh0, GP_TISR));
gptimer_wait(GP_TWPS_ALL);
bus_space_write_4(gptimer_iot, gptimer_ioh0, GP_TCRR, -duration);
-
+
return 1;
}
@@ -291,7 +291,7 @@ gptimer_cpu_initclocks()
ticks_per_intr = ticks_per_second / hz;
ticks_err_cnt = ticks_per_second % hz;
- ticks_err_sum = 0;;
+ ticks_err_sum = 0;
prcm_setclock(1, PRCM_CLK_SPEED_32);
prcm_setclock(2, PRCM_CLK_SPEED_32);
diff --git a/sys/arch/armv7/omap/intc.c b/sys/arch/armv7/omap/intc.c
index a68a5be5741..0ef55f66d1c 100644
--- a/sys/arch/armv7/omap/intc.c
+++ b/sys/arch/armv7/omap/intc.c
@@ -231,7 +231,7 @@ intc_calc_mask(void)
for (; i <= IPL_HIGH; i++)
intc_imask[INTC_IRQ_TO_REG(irq)][i] |=
1 << INTC_IRQ_TO_REGi(irq);
- /* XXX - set enable/disable, priority */
+ /* XXX - set enable/disable, priority */
bus_space_write_4(intc_iot, intc_ioh, INTC_ILRn(irq),
INTC_ILR_PRIs(NIPL-max)|INTC_ILR_IRQ);
}
@@ -276,7 +276,7 @@ intc_splraise(int new)
new = old;
intc_setipl(new);
-
+
return (old);
}
@@ -295,7 +295,7 @@ intc_setipl(int new)
volatile static int recursed = 0;
if (recursed == 0) {
recursed = 1;
- if (new != 12)
+ if (new != 12)
printf("setipl %d\n", new);
recursed = 0;
}
@@ -342,7 +342,7 @@ intc_irq_handler(void *frame)
else
arg = frame;
- if (ih->ih_func(arg))
+ if (ih->ih_func(arg))
ih->ih_count.ec_count++;
}
diff --git a/sys/arch/armv7/omap/intc.h b/sys/arch/armv7/omap/intc.h
index bc0a59f514a..42183b39cc1 100644
--- a/sys/arch/armv7/omap/intc.h
+++ b/sys/arch/armv7/omap/intc.h
@@ -46,7 +46,7 @@ find_first_bit( uint32_t bits )
int count;
/* since CLZ is available only on ARMv5, this isn't portable
- * to all ARM CPUs. This file is for OMAPINTC processor.
+ * to all ARM CPUs. This file is for OMAPINTC processor.
*/
asm( "clz %0, %1" : "=r" (count) : "r" (bits) );
return 31-count;
diff --git a/sys/arch/armv7/omap/nxphdmi.c b/sys/arch/armv7/omap/nxphdmi.c
index 322fb3e2d61..cb09bef887f 100644
--- a/sys/arch/armv7/omap/nxphdmi.c
+++ b/sys/arch/armv7/omap/nxphdmi.c
@@ -229,7 +229,7 @@
#define CEC_FRO_IM_CLK_CTRL_GHOST_DIS (1 << 7)
#define CEC_FRO_IM_CLK_CTRL_IMCLK_SEL (1 << 1)
-/* EDID reading */
+/* EDID reading */
#define EDID_LENGTH 0x80
#define MAX_READ_ATTEMPTS 100
diff --git a/sys/arch/armv7/omap/omdisplay.c b/sys/arch/armv7/omap/omdisplay.c
index 7fe18c08881..04197c46715 100644
--- a/sys/arch/armv7/omap/omdisplay.c
+++ b/sys/arch/armv7/omap/omdisplay.c
@@ -618,7 +618,7 @@ omdisplay_ioctl(void *v, u_long cmd, caddr_t data, int
flag, struct proc *p)
case WSDISPLAYIO_LINEBYTES:
if (scr != NULL)
*(u_int *)data = scr->rinfo.ri_stride;
- else
+ else
*(u_int *)data = 0;
break;
@@ -652,7 +652,7 @@ omdisplay_burner(void *v, u_int on, u_int flags)
int
omdisplay_show_screen(void *v, void *cookie, int waitok,
- void (*cb)(void *, int, int), void *cbarg)
+ void (*cb)(void *, int, int), void *cbarg)
{
struct omdisplay_softc *sc = v;
struct rasops_info *ri = cookie;
@@ -661,7 +661,7 @@ omdisplay_show_screen(void *v, void *cookie, int waitok,
old = sc->sc_active;
if (old == scr)
return 0;
-
+
if (old != NULL)
; /* Stop old screen */
@@ -826,7 +826,7 @@ omdisplay_set_backlight(int on)
omdisplay_set_brightness(omdisplay_get_brightness());
}
}
-
+
void
omdisplay_blank(int blank)
{
@@ -1023,8 +1023,8 @@ omdisplay_initialize(struct omdisplay_softc *sc,
scr->segs[0].ds_addr);
bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID1_BA0, 0);
- bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID1_BA1, 0);
- bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID1_SIZE, 0);
+ bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID1_BA1, 0);
+ bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID1_SIZE, 0);
bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID1_ATTRIBUTES, 0);
bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID1_FIFO_THRESHOLD,
0xc00040); /* XXX */
@@ -1092,7 +1092,7 @@ omdisplay_initialize(struct omdisplay_softc *sc,
bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID2_CONV_COEF1, 0);
bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID2_CONV_COEF2, 0);
bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID2_CONV_COEF3, 0);
- bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID2_CONV_COEF4, 0);
+ bus_space_write_4(sc->sc_iot, sc->sc_dcioh, DISPC_VID2_CONV_COEF4, 0);
omdisplay_start(sc);
}
@@ -1264,7 +1264,7 @@ omdisplay_new_screen(struct omdisplay_softc *sc,
sizeof (splash) > scr->buf_size ? scr->buf_size : sizeof (splash));
/* map memory for DMA */
- if (bus_dmamap_create(dma_tag, 1024 * 1024 * 2, 1,
+ if (bus_dmamap_create(dma_tag, 1024 * 1024 * 2, 1,
1024 * 1024 * 2, 0, busdma_flag, &scr->dma))
goto bad;
error = bus_dmamap_load(dma_tag, scr->dma,
diff --git a/sys/arch/armv7/omap/omehcivar.h b/sys/arch/armv7/omap/omehcivar.h
index 8eed72d4a5a..114e98f66f6 100644
--- a/sys/arch/armv7/omap/omehcivar.h
+++ b/sys/arch/armv7/omap/omehcivar.h
@@ -170,7 +170,7 @@
#define UHH_HOSTCONFIG_AUTOPPD_ON_OVERCUR_EN (1UL << 1)
#define UHH_HOSTCONFIG_P1_ULPI_BYPASS (1UL << 0)
-/* The following are on rev2 (OMAP44xx) of the EHCI only */
+/* The following are on rev2 (OMAP44xx) of the EHCI only */
#define UHH_SYSCONFIG_IDLEMODE_MASK (3UL << 2)
#define UHH_SYSCONFIG_IDLEMODE_NOIDLE (1UL << 2)
#define UHH_SYSCONFIG_STANDBYMODE_MASK (3UL << 4)
@@ -215,7 +215,7 @@
#define ULPI_DEBUG 0x15
#define ULPI_SCRATCH 0x16
-/*
+/*
* Values of UHH_REVISION - Note: these are not given in the TRM but taken
* from the linux OMAP EHCI driver (thanks guys). It has been verified on
* a Panda and Beagle board.
diff --git a/sys/arch/armv7/omap/omusbtll.c b/sys/arch/armv7/omap/omusbtll.c
index 3ab75532b93..b3e1a1292df 100644
--- a/sys/arch/armv7/omap/omusbtll.c
+++ b/sys/arch/armv7/omap/omusbtll.c
@@ -60,7 +60,7 @@
#define USBTLL_CHANNEL_CONF_CHANMODE_SH 1
#define USBTLL_CHANNEL_CONF_CHANEN (1<<0)
-/*
+/*
ULPI_VENDOR_ID_LO_(i) (0x0800 + (0x100 * (i)))
ULPI_VENDOR_ID_HI_(i) (0x0801 + (0x100 * (i)))
ULPI_PRODUCT_ID_LO_(i) (0x0802 + (0x100 * (i)))
diff --git a/sys/arch/armv7/omap/sitara_cm.h b/sys/arch/armv7/omap/sitara_cm.h
index cbe85df0894..bfcc326f25d 100644
--- a/sys/arch/armv7/omap/sitara_cm.h
+++ b/sys/arch/armv7/omap/sitara_cm.h
@@ -64,7 +64,7 @@ struct sitara_cm_device {
struct sitara_cm_padconf *padconf;
};
-int sitara_cm_padconf_set(const char *padname, const char *muxmode,
+int sitara_cm_padconf_set(const char *padname, const char *muxmode,
unsigned int state);
int sitara_cm_padconf_get(const char *padname, const char **muxmode,
unsigned int *state);
diff --git a/sys/arch/armv7/omap/ti_iic.c b/sys/arch/armv7/omap/ti_iic.c
index 8eeb6bd7fd4..09502ef4001 100644
--- a/sys/arch/armv7/omap/ti_iic.c
+++ b/sys/arch/armv7/omap/ti_iic.c
@@ -364,7 +364,7 @@ ti_iic_op(struct ti_iic_softc *sc, i2c_addr_t addr,
ti_i2cop_t op,
int err, retry;
KASSERT(op == TI_I2CREAD || op == TI_I2CWRITE);
- DPRINTF(("ti_iic_op: addr %#x op %#x buf %p buflen %#x flags %#x\n",
+ DPRINTF(("ti_iic_op: addr %#x op %#x buf %p buflen %#x flags %#x\n",
addr, op, buf, (unsigned int) buflen, flags));
mask = I2C_IRQSTATUS_ARDY | I2C_IRQSTATUS_NACK | I2C_IRQSTATUS_AL;
diff --git a/sys/arch/armv7/stand/efiboot/efidev.h
b/sys/arch/armv7/stand/efiboot/efidev.h
index 6ef83bcf045..4bc60ca0976 100644
--- a/sys/arch/armv7/stand/efiboot/efidev.h
+++ b/sys/arch/armv7/stand/efiboot/efidev.h
@@ -14,8 +14,8 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
diff --git a/sys/arch/armv7/sunxi/sxiintc.c b/sys/arch/armv7/sunxi/sxiintc.c
index 3ba1b307233..3927141fcfb 100644
--- a/sys/arch/armv7/sunxi/sxiintc.c
+++ b/sys/arch/armv7/sunxi/sxiintc.c
@@ -254,7 +254,7 @@ sxiintc_calc_masks(void)
for (; i < NIPL; i++)
sxiintc_imask[IRQ2REG32(irq)][i] |=
(1 << IRQ2BIT32(irq));
- /* XXX - set enable/disable, priority */
+ /* XXX - set enable/disable, priority */
}
sxiintc_setipl(ci->ci_cpl);
@@ -297,7 +297,7 @@ sxiintc_splraise(int new)
new = old;
sxiintc_setipl(new);
-
+
return (old);
}
@@ -365,7 +365,7 @@ sxiintc_irq_handler(void *frame)
else
arg = frame;
- if (ih->ih_func(arg))
+ if (ih->ih_func(arg))
ih->ih_count.ec_count++;
}
sxiintc_splx(s);
diff --git a/sys/arch/armv7/sunxi/sxitimer.c b/sys/arch/armv7/sunxi/sxitimer.c
index 21cf51da690..3651c97b4ad 100644
--- a/sys/arch/armv7/sunxi/sxitimer.c
+++ b/sys/arch/armv7/sunxi/sxitimer.c
@@ -267,7 +267,7 @@ sxitimer_cpu_initclocks(void)
ctrl | TIMER_ENABLE | TIMER_RELOAD | TIMER_SINGLESHOT);
}
-/*
+/*
* See comment in arm/xscale/i80321_clock.c
*
* Counter is count up, but with autoreload timers it is not possible
diff --git a/sys/arch/armv7/vexpress/sysreg.c b/sys/arch/armv7/vexpress/sysreg.c
index 622ebf83926..842844d812b 100644
--- a/sys/arch/armv7/vexpress/sysreg.c
+++ b/sys/arch/armv7/vexpress/sysreg.c
@@ -16,10 +16,10 @@
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/device.h>
-#include <machine/bus.h>
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <machine/bus.h>
#include <machine/fdt.h>
#include <armv7/armv7/armv7var.h>
--
Jerome Pinot
