On Fri, Dec 29, 2017 at 02:04:32PM +0100, Mark Kettenis wrote:
>
> > Date: Thu, 28 Dec 2017 10:07:12 +0800
> > From: Kevin Lo <ke...@openbsd.org>
> >
> > On Wed, Dec 27, 2017 at 10:48:16AM +0100, Mark Kettenis wrote:
> > >
> > > > Date: Wed, 27 Dec 2017 09:37:12 +0800
> > > > From: Kevin Lo <ke...@openbsd.org>
> > > >
> > > > On Tue, Dec 26, 2017 at 06:20:59PM +0100, Mark Kettenis wrote:
> > > > >
> > > > > > Date: Tue, 26 Dec 2017 22:51:38 +0800
> > > > > > From: Kevin Lo <ke...@openbsd.org>
> > > > > >
> > > > > > > Shouldn't be too difficult to add support for that one to
> > > > > > > axppmic(4).
> > > > > > > Do you want me to create a diff for you to test?
> > > > > >
> > > > > > That'd be great, thanks. Testing is easier than writing code :)
> > > > >
> > > > > Here's a diff. Should give you a couple of sensors and working
> > > > > regulators. That might make the on-board eMMC work.
> > > > >
> > > >
> > > > Thanks, but I keep getting these messages:
> > > >
> > > > axppmic0 at sxirsb0 addr 0x3a3: AXP223
> > > > sxirsb0: RD8 failed for run-time address 0x2d
> > > > sxirsb0: RD8 failed for run-time address 0x2d
> > > > sxirsb0: WR8 failed for run-time address 0x2d
> > > > sxirsb0: RD8 failed for run-time address 0x2d
> > > > sxirsb0: RD8 failed for run-time address 0x2d
> > >
> > > That suggests communication with the device over the RSB is failing.
> > >
> > > Can you send me the output of
> > >
> > > # eeprom -p
> > >
> > > for that board?
> >
> > Sure, here you go: http://ix.io/DsI
>
> Ok. Looks like a was a bit quick ok'ing that initial sxiccmu(4) diff.
> The PRCM clocks that you defined aren't actually being hooked up since
> the nodes in the device tree are subnodes of the "prcm" node. They
> also don't have a "reg" property. So hooking them up is slightly
> non-trivial. Diff below adds code to do that, but I can't test this
> unfortunately. Can you give it a go, and maybe add some printfs in
> sxiccmu_attach_clocks() to see wether the PRCM clocks are really
> registered? Hopefully this will fix the RSB issue.
Thanks for the explanation. Your diff does solve the rsb problem to me,
thanks again!
> > BTW, mine is BPI-M2 Magic, the board without eMMC [1].
>
> A right. But the device tree has the eMMC controller enabled, so that
> is why you get some error messages.
>
>
> Index: dev/fdt/sxiccmu.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/fdt/sxiccmu.c,v
> retrieving revision 1.14
> diff -u -p -r1.14 sxiccmu.c
> --- dev/fdt/sxiccmu.c 28 Dec 2017 18:11:13 -0000 1.14
> +++ dev/fdt/sxiccmu.c 29 Dec 2017 12:57:01 -0000
> @@ -79,7 +79,7 @@ struct cfdriver sxiccmu_cd = {
> NULL, "sxiccmu", DV_DULL
> };
>
> -void sxiccmu_attach_clock(struct sxiccmu_softc *, int);
> +void sxiccmu_attach_clock(struct sxiccmu_softc *, int, int);
>
> uint32_t sxiccmu_ccu_get_frequency(void *, uint32_t *);
> int sxiccmu_ccu_set_frequency(void *, uint32_t *, uint32_t);
> @@ -124,6 +124,7 @@ sxiccmu_match(struct device *parent, voi
> return (OF_is_compatible(node, "allwinner,sun4i-a10-ccu") ||
> OF_is_compatible(node, "allwinner,sun7i-a20-ccu") ||
> OF_is_compatible(node, "allwinner,sun8i-a23-ccu") ||
> + OF_is_compatible(node, "allwinner,sun8i-a23-prcm") ||
> OF_is_compatible(node, "allwinner,sun8i-a33-ccu") ||
> OF_is_compatible(node, "allwinner,sun8i-h3-ccu") ||
> OF_is_compatible(node, "allwinner,sun8i-h3-r-ccu") ||
> @@ -218,7 +219,7 @@ sxiccmu_attach(struct device *parent, st
> sc->sc_set_frequency = sxiccmu_a64_set_frequency;
> } else {
> for (node = OF_child(node); node; node = OF_peer(node))
> - sxiccmu_attach_clock(sc, node);
> + sxiccmu_attach_clock(sc, node, faa->fa_nreg);
> }
>
> if (sc->sc_gates) {
> @@ -259,6 +260,7 @@ struct sxiccmu_device {
> int (*set_frequency)(void *, uint32_t *, uint32_t);
> void (*enable)(void *, uint32_t *, int);
> void (*reset)(void *, uint32_t *, int);
> + bus_size_t offset;
> };
>
> uint32_t sxiccmu_gen_get_frequency(void *, uint32_t *);
> @@ -356,7 +358,8 @@ struct sxiccmu_device sxiccmu_devices[]
> },
> {
> .compat = "allwinner,sun6i-a31-clock-reset",
> - .reset = sxiccmu_reset
> + .reset = sxiccmu_reset,
> + .offset = 0x00b0
> },
> {
> .compat = "allwinner,sun7i-a20-ahb-gates-clk",
> @@ -379,7 +382,8 @@ struct sxiccmu_device sxiccmu_devices[]
> },
> {
> .compat = "allwinner,sun8i-a23-apb0-clk",
> - .get_frequency = sxiccmu_apbs_get_frequency
> + .get_frequency = sxiccmu_apbs_get_frequency,
> + .offset = 0x000c
> },
> {
> .compat = "allwinner,sun8i-a23-ahb1-gates-clk",
> @@ -389,7 +393,8 @@ struct sxiccmu_device sxiccmu_devices[]
> {
> .compat = "allwinner,sun8i-a23-apb0-gates-clk",
> .get_frequency = sxiccmu_gen_get_frequency,
> - .enable = sxiccmu_gate_enable
> + .enable = sxiccmu_gate_enable,
> + .offset = 0x0028
> },
> {
> .compat = "allwinner,sun8i-a23-apb1-gates-clk",
> @@ -470,11 +475,11 @@ struct sxiccmu_device sxiccmu_devices[]
> };
>
> void
> -sxiccmu_attach_clock(struct sxiccmu_softc *sc, int node)
> +sxiccmu_attach_clock(struct sxiccmu_softc *sc, int node, int nreg)
> {
> struct sxiccmu_clock *clock;
> uint32_t reg[2];
> - int i;
> + int i, error = ENODEV;
>
> for (i = 0; i < nitems(sxiccmu_devices); i++)
> if (OF_is_compatible(node, sxiccmu_devices[i].compat))
> @@ -485,14 +490,18 @@ sxiccmu_attach_clock(struct sxiccmu_soft
> clock = malloc(sizeof(*clock), M_DEVBUF, M_WAITOK);
> clock->sc_node = node;
>
> + clock->sc_iot = sc->sc_iot;
> if (OF_getpropintarray(node, "reg", reg, sizeof(reg)) == sizeof(reg)) {
> - clock->sc_iot = sc->sc_iot;
> - if (bus_space_map(clock->sc_iot, reg[0], reg[1], 0,
> - &clock->sc_ioh)) {
> - printf("%s: can't map registers", sc->sc_dev.dv_xname);
> - free(clock, M_DEVBUF, sizeof(*clock));
> - return;
> - }
> + error = bus_space_map(clock->sc_iot, reg[0], reg[1], 0,
> + &clock->sc_ioh);
> + } else if (nreg > 0) {
> + error = bus_space_subregion(clock->sc_iot, sc->sc_ioh,
> + sxiccmu_devices[i].offset, 4, &clock->sc_ioh);
> + }
> + if (error) {
> + printf("%s: can't map registers", sc->sc_dev.dv_xname);
> + free(clock, M_DEVBUF, sizeof(*clock));
> + return;
> }
>
> clock->sc_cd.cd_node = node;
>
>
