This diff changes the access permission bits we use in our page tables
to something that is compatible with setting the Access Flag Enable
bit in the System Control Register. The main thing that changes is
that this changes userland read-only pages to be no longer writable
from the kernel. And I think we all agree that that's a good thing!
This change will allow us to use AP[0] as an access flag to keep track
of referenced pages. That in turn will help to disentangle the XN
(eXecute Never) bit from the page table entry type, and enable NX
functionality on armv7.
To prove this works, the diff also goes ahead and sets the Access Flag
Enable bit. That way we'll fault if we see a non-compatible access
permissions encoding.
ok?
P.S. This has no effect on kbind(2), which simply creates a kernel
mapping of the userland page it needs to modify.
Index: arch/arm/arm/cpufunc.c
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/cpufunc.c,v
retrieving revision 1.43
diff -u -p -r1.43 cpufunc.c
--- arch/arm/arm/cpufunc.c 3 Aug 2016 07:05:05 -0000 1.43
+++ arch/arm/arm/cpufunc.c 10 Aug 2016 18:13:19 -0000
@@ -581,7 +581,8 @@ armv7_setup()
| CPU_CONTROL_AFLT_ENABLE
| CPU_CONTROL_DC_ENABLE
| CPU_CONTROL_BPRD_ENABLE
- | CPU_CONTROL_IC_ENABLE;
+ | CPU_CONTROL_IC_ENABLE
+ | CPU_CONTROL_AFE;
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
Index: arch/arm/include/pmap.h
===================================================================
RCS file: /cvs/src/sys/arch/arm/include/pmap.h,v
retrieving revision 1.41
diff -u -p -r1.41 pmap.h
--- arch/arm/include/pmap.h 8 Aug 2016 14:47:52 -0000 1.41
+++ arch/arm/include/pmap.h 10 Aug 2016 18:13:19 -0000
@@ -470,7 +470,7 @@ extern void (*pmap_zero_page_func)(struc
#define L1_S_PROT_KW_xscale (L1_S_AP(AP_W))
#define L1_S_PROT_MASK_xscale (L1_S_AP(0x03))
-#define L1_S_PROT_UR_v7 (L1_S_V7_AP(AP_KRWUR))
+#define L1_S_PROT_UR_v7 (L1_S_V7_AP(AP_V7_KRUR))
#define L1_S_PROT_UW_v7 (L1_S_V7_AP(AP_KRWURW))
#define L1_S_PROT_KR_v7 (L1_S_V7_AP(AP_V7_KR))
#define L1_S_PROT_KW_v7 (L1_S_V7_AP(AP_KRW))
@@ -496,7 +496,7 @@ extern void (*pmap_zero_page_func)(struc
#define L2_L_PROT_UW_xscale (L2_AP(AP_U|AP_W))
#define L2_L_PROT_MASK_xscale (L2_AP(AP_U|AP_W))
-#define L2_L_PROT_UR_v7 (L2_V7_AP(AP_KRWUR))
+#define L2_L_PROT_UR_v7 (L2_V7_AP(AP_V7_KRUR))
#define L2_L_PROT_UW_v7 (L2_V7_AP(AP_KRWURW))
#define L2_L_PROT_KR_v7 (L2_V7_AP(AP_V7_KR))
#define L2_L_PROT_KW_v7 (L2_V7_AP(AP_KRW))
@@ -522,7 +522,7 @@ extern void (*pmap_zero_page_func)(struc
#define L2_S_PROT_KW_xscale (L2_AP0(AP_W))
#define L2_S_PROT_MASK_xscale (L2_AP0(AP_U|AP_W))
-#define L2_S_PROT_UR_v7 (L2_V7_AP(AP_KRWUR))
+#define L2_S_PROT_UR_v7 (L2_V7_AP(AP_V7_KRUR))
#define L2_S_PROT_UW_v7 (L2_V7_AP(AP_KRWURW))
#define L2_S_PROT_KR_v7 (L2_V7_AP(AP_V7_KR))
#define L2_S_PROT_KW_v7 (L2_V7_AP(AP_KRW))
Index: arch/arm/include/pte.h
===================================================================
RCS file: /cvs/src/sys/arch/arm/include/pte.h,v
retrieving revision 1.4
diff -u -p -r1.4 pte.h
--- arch/arm/include/pte.h 26 Apr 2013 05:05:34 -0000 1.4
+++ arch/arm/include/pte.h 10 Aug 2016 18:13:19 -0000
@@ -238,6 +238,7 @@ typedef uint32_t pt_entry_t; /* L2 table
#define AP_V7_KR 0x05
#define AP_KRW 0x01 /* kernel read/write */
#define AP_KRWUR 0x02 /* kernel read/write usr read */
+#define AP_V7_KRUR 0x07 /* kernel read usr read */
#define AP_KRWURW 0x03 /* kernel read/write usr
read/write */
/*
