On Tue, Jan 26, 2016 at 07:32:40PM +1100, Jonathan Gray wrote:
> On Sun, Jan 24, 2016 at 01:02:49AM +0100, Patrick Wildt wrote:
> > Hi,
> > 
> > there are two code points in the v7 pmap where we need the physical
> > address (to flush secondary cache) and use pmap_extract() instead
> > of just reading it from the vm page.  This diff removes those.
> > 
> > Patrick
> 
> When running with this diff on a imx6 cubox two out of three times xenocara
> builds have failed with sh dumping core due to bus errors.  Once in
> Mesa, and once in libXmu.  I don't remember that happening before,
> but I'll try and so some more builds on it without the diff.

Did you encounter any more issues running that diff?  Have you tried
compiling xenocara without after seeing those issues?

So far I have only run into unrelated build issues, like a missing
define or a python script being started without it having executable
permissions.

> 
> > 
> > diff --git sys/arch/arm/arm/pmap7.c sys/arch/arm/arm/pmap7.c
> > index 5bcc67b..78969bd 100644
> > --- sys/arch/arm/arm/pmap7.c
> > +++ sys/arch/arm/arm/pmap7.c
> > @@ -1105,11 +1105,9 @@ pmap_clean_page(struct vm_page *pg, int isync)
> >                      * now while we still have a valid mapping for it.
> >                      */
> >                     if (!wb) {
> > -                           paddr_t pa;
> >                             cpu_dcache_wb_range(pv->pv_va, PAGE_SIZE);
> > -                           if (pmap_extract(pm, (vaddr_t)pv->pv_va, &pa))
> > -                                   cpu_sdcache_wb_range(pv->pv_va, pa,
> > -                                       PAGE_SIZE);
> > +                           cpu_sdcache_wb_range(pv->pv_va,
> > +                               VM_PAGE_TO_PHYS(pg), PAGE_SIZE);
> >                             wb = TRUE;
> >                     }
> >             }
> > @@ -1126,10 +1124,8 @@ pmap_clean_page(struct vm_page *pg, int isync)
> >             PTE_SYNC(cwb_pte);
> >             cpu_tlb_flushD_SE(cwbp);
> >             cpu_cpwait();
> > -           paddr_t pa;
> >             cpu_dcache_wb_range(cwbp, PAGE_SIZE);
> > -           if (pmap_extract(pmap_kernel(), (vaddr_t)cwbp, &pa))
> > -                   cpu_sdcache_wb_range(cwbp, pa, PAGE_SIZE);
> > +           cpu_sdcache_wb_range(cwbp, VM_PAGE_TO_PHYS(pg), PAGE_SIZE);
> >     }
> >  }
> >  
> > 

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