ch in the series switches thegithub triggered
Coverity build to use json-c.
All should be considered for 4.21.
Agree, we could consider that to have that in 4.21 as it fixes some minor
problems and isn't too intrusive:
Release-Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
Thanks, Roger.
-by: Jason Andryuk
Release-Acked-By: Oleksii Kurochko
Thanks.
~ Oleksii
---
xen/arch/x86/boot/edd.S | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/xen/arch/x86/boot/edd.S b/xen/arch/x86/boot/edd.S
index 3df712bce1..02437511b2 100644
--- a/xen/arch/x86/boot/e
cc: Juergen Gross
cc: Oleksii Kurochko
---
tools/libs/light/libxl_pci.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
With getting proper Ack(s) from maintainers, the patch could be considered
to be in 4.21:
Release-Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
diff --gi
On 10/9/25 2:06 PM, Jan Beulich wrote:
On 09.10.2025 11:21, Oleksii Kurochko wrote:
On 10/7/25 3:09 PM, Jan Beulich wrote:
On 29.09.2025 15:30, Oleksii Kurochko wrote:
On 9/22/25 6:28 PM, Jan Beulich wrote:
On 17.09.2025 23:55, Oleksii Kurochko wrote:
@@ -318,11 +331,87 @@ static inline
On 10/9/25 2:36 PM, Jan Beulich wrote:
On 08.10.2025 22:11, Jason Andryuk wrote:
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -220,6 +220,23 @@ F: xen/drivers/acpi/
F:xen/include/acpi/
F:tools/libacpi/
+AMD IOMMU
+M: Jan Beulich
+M: Andrew Cooper
+M: Roger Pau Monné
+R:
On 10/2/25 3:38 PM, Roger Pau Monné wrote:
On Thu, Oct 02, 2025 at 11:37:36AM +0100, Andrew Cooper wrote:
On 02/10/2025 11:22 am, Roger Pau Monne wrote:
Reading from the E9 port if the emergency console is active should return
0xe9 according to the documentation from Bochs:
https://bochs.sour
h this wanting to be considered for 4.21.
... but if it is not clear at the moment how to instruct the EFI loader to
load below 4G, then I am okay with this solution and it should be part of 4.21:
Release-Acked-By: Oleksii Kurochko
Thanks.
~ Oleksii
~Andrew
(Retaining full patch for those
should be considered for 4.21 at this point.
Coverage is an optional feature, off-by-default, but Xen does support
GCC and Clang (older Clang at least), and right now newer Clang simply
malfunctions.
In this case, I agree that it should be considered for 4.21:
Release-Acked-By: Oleksii Kurochko
On 9/22/25 7:35 PM, Jan Beulich wrote:
On 17.09.2025 23:55, Oleksii Kurochko wrote:
Implement the p2m_next_level() function, which enables traversal and dynamic
allocation of intermediate levels (if necessary) in the RISC-V
p2m (physical-to-machine) page table hierarchy.
To support this, the
On 9/30/25 2:46 PM, Roger Pau Monné wrote:
On Mon, Sep 29, 2025 at 05:59:00PM +0200, Oleksii Kurochko wrote:
On 9/29/25 10:41 AM, Roger Pau Monne wrote:
I've had the luck to come across a PCI card that exposes a MSI-X capability
where the BIR of the vector and PBA tables points at a BAR
Pau Monné
---
Cc: Stewart Hildebrand
Cc: Jan Beulich
Cc: Oleksii Kurochko
While not strictly a bugfix, I consider this a worthy improvement so that
PVH dom0 has a chance to boot on hardware that exposes such broken MSI-X
capabilities.
Based on your commit description it looks like a bug as witho
On 9/29/25 2:07 PM, Anthony PERARD wrote:
From: Anthony PERARD
Patch series available in this git branch:
https://xenbits.xenproject.org/git-http/people/aperard/xen-unstable.git
br.libxl-libjsonc-v2
changes in v2:
- introduce $(XEN_JSON_LIBS) to have either -lyajl or -ljson-c or both (for a
Signed-off-by: Oleksii Kurochko
---
Chnages in v2:
- Drop the following items:
- Allow to unflatten DTs.
- Basic kexec support to Mini-OS for running in PVH mode.
---
CHANGELOG.md | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/CHANGELOG.md b/CHANGELOG.md
On 9/26/25 9:07 AM, Jan Beulich wrote:
On 25.09.2025 22:08, Oleksii Kurochko wrote:
On 9/20/25 1:36 AM, Jan Beulich wrote:
On 17.09.2025 23:55, Oleksii Kurochko wrote:
+static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn)
+{
+unsigned long root_table_indx
On 9/25/25 3:46 PM, Jan Beulich wrote:
On 24.09.2025 17:00, Oleksii Kurochko wrote:
On 9/24/25 1:31 PM, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
#include
On 9/19/25 11:26 PM, Jan Beulich wrote:
On 17.09.2025 23:55, Oleksii Kurochko wrote:
@@ -151,6 +152,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
gstage_mode_detect();
+vmid_init();
Like for the earlier patch, I'm not convinced this is a function good
to
On 9/25/25 10:11 AM, Roger Pau Monné wrote:
On Thu, Sep 25, 2025 at 09:41:43AM +0200, Jan Beulich wrote:
On 25.09.2025 09:40, Roger Pau Monné wrote:
On Thu, Sep 25, 2025 at 09:37:46AM +0200, Jan Beulich wrote:
On 25.09.2025 09:34, Roger Pau Monné wrote:
On Thu, Sep 25, 2025 at 09:03:06AM +02
Beulich
May I please ask for feedback here, so that hopefully we can have this
sorted in 4.21?
It is okay for me to have this change in 4.21:
Release-Acked-by: Oleksii Kurochko
~ Oleksii
Jan
---
Factor 2 may in principle still be too small: We zap what looks like
real file symbols already
On 9/25/25 8:26 AM, Jan Beulich wrote:
On 24.09.2025 11:36, Oleksii Kurochko wrote:
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -14,6 +14,7 @@ The format is based on [Keep a
Changelog](https://keepachangelog.com/en/1.0.0/)
- Debian Trixie added to CI. Debian Bullseye retired from CI for RISC
cs
patch for a new feature so ought to be considered.
It is okay with me to have this docs patch in Xen 4.21:
Release-Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
On 9/20/25 12:14 AM, Jan Beulich wrote:
On 17.09.2025 23:55, Oleksii Kurochko wrote:
+{
+return MASK_INSR(mfn_x(page_to_mfn(p2m->root)), HGATP_PPN) |
+ MASK_INSR(gstage_mode, HGATP_MODE_MASK) |
+ MASK_INSR(vmid, HGATP_VMID_MASK);
+}
+
+static int p2m_alloc_root_ta
On 9/24/25 1:31 PM, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -148,6 +149,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id
On 9/18/25 5:54 PM, Jan Beulich wrote:
On 17.09.2025 23:55, Oleksii Kurochko wrote:
--- /dev/null
+++ b/xen/arch/riscv/p2m.c
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+unsigned long
Signed-off-by: Oleksii Kurochko
---
CHANGELOG.md | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/CHANGELOG.md b/CHANGELOG.md
index ca1b43b940..5a0902cc3e 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -14,6 +14,7 @@ The format is based on [Keep a
Changelog
obe).
+ - New amd-cppc/amd-cppc-epp cpufreq driver.
LGTM: Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
- On Arm:
- Ability to enable stack protector
On 9/9/25 11:53 PM, Stefano Stabellini wrote:
On Tue, 9 Sep 2025, Marek Marczykowski-Górecki wrote:
On Sat, Aug 09, 2025 at 11:12:01PM +0100, Andrew Cooper wrote:
I know it's past the last-post deadline, but Trixie was only released today.
In terms of backports, we should at least go back to
pointing to next-level page
tables with correct attributes.
- p2m_alloc_page(): Allocates page table pages, supporting both hardware and
guest domains.
- p2m_create_table(): Allocates and initializes a new page table page and
installs it into the hierarchy.
Signed-off-by: Oleksii Kurochko
On 9/8/25 11:04 AM, Mykola Kvach wrote:
Hi Denis and Stefano
I’d like to acknowledge the significant effort that went into this patch
series -- it’s clear that a lot of work has been invested.
On Sat, Sep 6, 2025 at 5:02 AM Stefano Stabellini
wrote:
Oleksii and all,
I would like to conside
walk logic has been adjusted, as ARM uses the
opposite level numbering compared to RISC-V.
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- s/number of levels/level numbering in the commit message.
- s/permissions/attributes.
- Remove redundant comment in p2m_split_superpage() about page
resolve these errors, the following functions have also been introduced,
based on their Arm counterparts:
- page_get_owner_and_reference() and its variant to safely acquire a
reference to a page and retrieve its owner.
- Implement page_is_offlinable() to return false for RISC-V.
Signed-off-by: Oleksii Kur
Implement put_page(), as it will be used by p2m_put_*-related code.
Although CONFIG_STATIC_MEMORY has not yet been introduced for RISC-V,
a stub for PGC_static is added to avoid cluttering the code of
put_page() with #ifdefs.
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- Update the
which corresponds
to Arm's THIRD_MASK.
- Replaced open-coded bit shifts with the BIT() macro.
- Other minor changes, such as using RISC-V-specific functions to validate
P2M PTEs, and replacing Arm-specific GUEST_* macros with their RISC-V
equivalents.
Signed-off-by: Oleksi
e original superpage is invalidated.
Also, update p2m_{get,set}_type to work with P2M types which don't fit
into PTE bits.
Suggested-by: Jan Beulich
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- Add Suggested-by: Jan Beulich .
- Update the comment above declation of md structure inside s
a 2MB
superpage.
- p2m_get_type(): Extracts the stored p2m_type from the PTE bits.
- p2m_free_page(): Returns a page to a domain's freelist.
- Introduce p2m_is_foreign() and connected to it things.
Defines XEN_PT_ENTRIES in asm/page.h to simplify loops over page table
entries.
Signed
a possible page-fault
if A and D bits aren't set.
PBMT type encoding support:
- Introduces an enum pbmt_type_t to represent the PBMT field values.
- Maps types like p2m_mmio_direct_dev to p2m_mmio_direct_io, others default
to pbmt_pma.
Signed-off-by: Oleksii Kurochko
--
some pages before
allocate 16 KiB pages for root page table.
- Allocate root p2m table after p2m pool is initialized.
- Add construct_hgatp() to construct the hgatp register value based on
p2m->root, p2m->hgatp_mode and VMID.
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
device memory.
- Introduce p2m_first_external for detection for relational operations
with p2m type which is stored outside P2M's PTE bits.
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- Drop underscode in p2m_to_mask()'s argument and for other similar helpers.
-
guest_physmap_add_entry()
unnecessary.
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- Update the comment above declaration of map_regions_p2mt():
s/guest p2m/guest's hostp2m.
- Add const for p2m_force_tlb_flush_sync()'s local variable `d`.
- Stray 'w' i
larify the VMIDLEN
value, rename stuff connected to VMID enable/disable to "VMID use
enable/disable".
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- s/guest's virtual/guest-physical in the comment inside vmid.c
and in commit message.
- Drop x86-related numbers in the com
Introduce gstage_mode_detect() to probe supported G-stage paging
modes at boot. The function iterates over possible HGATP modes
(Sv32x4 on RV32, Sv39x4/Sv48x4/Sv57x4 on RV64) and selects the
first valid one by programming CSR_HGATP and reading it back.
The selected mode is stored in gstage_mode (m
ff-by: Oleksii Kurochko
---
Changes in V4:
- Introduce gstage_root_level and use it for defintion of P2M_ROOT_LEVEL.
- Introduce P2M_LEVEL_ORDER() macros and P2M_PAGETABLE_ENTRIES().
- Add the TODO comment in p2m_write_pte() about possible perfomance
optimization.
- Use compound literal for
Introduce helpers pte_{set,get}_mfn() to simplify setting and getting
of mfn.
Also, introduce PTE_PPN_MASK and add BUILD_BUG_ON() to be sure that
PTE_PPN_MASK remains the same for all MMU modes except Sv32.
Signed-off-by: Oleksii Kurochko
Acked-by: Jan Beulich
---
Changes in V4:
- Nothing
ports (e.g. RISC-V or PowerPC).
No functional changes — the definition is preserved via a static inline
function for Arm.
Suggested-by: Jan Beulich
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- Introduce arch_dt_passthrough_p2m_type() instead of re-defining of
p2m_mmio_direct
roduce guest domain's VMID allocation and manegement.
- Add patches necessary to implement p2m lookup:
- xen/riscv: implement mfn_valid() and page reference, ownership handling
helpers
- xen/riscv: add support of page lookup by GFN
- Re-sort patch series.
- All other changes are patch-spe
.
Signed-off-by: Oleksii Kurochko
---
Changes in V4:
- Move an introduction of clean_pte member of p2m_domain structure to the
patch where it is started to be used:
xen/riscv: add root page table allocation
- Add prototype of p2m_init() to asm/p2m.h.
---
Changes in V3:
- s/p2m_type/p2m_types
implementation of paging_freelist_adjust() and
paging_domain_init().
Signed-off-by: Oleksii Kurochko
Acked-by: Jan Beulich
---
Changes in V4:
- s/paging_freelist_init/paging_freelist_adjust.
- Add empty line between definiton of paging_freelist_adjust()
and paging_domain_init().
- Update commit
On 9/16/25 12:32 PM, Grygorii Strashko wrote:
From: Grygorii Strashko
Since commit b99227347230 ("x86: Fix AMD_SVM and INTEL_VMX dependency") the
AMD-V support can be gracefully disabled, but it still keeps SVM
code partially built-in, because HVM code uses mix of:
- "cpu_has_svm" macro, which
> On 14 Sep 2025, at 10:57, Jan Beulich wrote:
>
> On 14.09.2025 18:59, Oleksii Kurochko wrote:
>>
>>> On 9/14/25 3:43 PM, Jan Beulich wrote:
>>> On 12.09.2025 23:23, Julien Grall wrote:
>>>> On 11/09/2025 09:14, Jan Beulich wrote:
>>>
On 9/14/25 3:43 PM, Jan Beulich wrote:
On 12.09.2025 23:23, Julien Grall wrote:
On 11/09/2025 09:14, Jan Beulich wrote:
Other projects have long switched to xz and/or lzip.
Tidy things some as well: With the removal of qemu from the tarball,
intermediately extracting the tarball again has bec
dy agreed that it is fine to have this patch
series in
4-21. Just to be sure:
Release-Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
CCing Oleksii Kurochko to keep track.
Cheers,
On 9/12/25 4:44 PM, Andrew Cooper wrote:
This was missed when introducing Trixie.
Fixes: aad6ebf0596f ("CI: Update riscv64 to use Debian Trixie")
Signed-off-by: Andrew Cooper
Reviewed-by: Denis Mukhin
Reviewed-by: Oleksii Kurochko
~ Oleksii
---
CC: Anthony PERARD
CC: Michal Orz
On 9/13/25 12:30 PM, Oleksii Moisieiev wrote:
Move the SCI (System Control and Management Interface) resource cleanup
earlier in the domain_relinquish_resources() sequence to ensure proper
cleanup ordering during domain destruction.
The SCI cleanup is now performed before TEE (Trusted Execution
Hello Oleksii,
On 9/8/25 4:21 PM, Oleksii Moisieiev wrote:
On 08/09/2025 17:11, Oleksii Kurochko wrote:
Hello everyone,
Based on the message from the previous version, the MISRA issues have been
fixed,
and aside from one remaining documentation patch ("docs: arm: add docs for SCMI
ove
stification on its own, the additional
context helps clarify why we're committing this change now, rather than waiting
until after the release. It also highlights the additional benefit of improving
MISRA compliance by removing this dead code.
Anyway, I am okay with having these patches merged now
Hello everyone,
I would like to inform you that the release schedule has been updated due to
an extension of the Feature Freeze.
The Code Freeze is now scheduled for*Friday, October 3, 2025*.
You can find the updated schedule here:
https://wiki.xenproject.org/wiki/Xen_Project_X.YY_Release_Note
On 9/11/25 12:23 AM, Andrew Cooper wrote:
Also state the RISC-V baseline now it's been set, as it's the reason why
RISC-V Bullseye got dropped.
Signed-off-by: Andrew Cooper
LGTM: Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
---
CC: Anthony PERARD
CC: Michal Orzel
CC: Jan
Hello Everyone,
On 9/8/25 11:04 AM, Mykola Kvach wrote:
Hi Denis and Stefano
I’d like to acknowledge the significant effort that went into this patch
series -- it’s clear that a lot of work has been invested.
On Sat, Sep 6, 2025 at 5:02 AM Stefano Stabellini
wrote:
Oleksii and all,
I would
On 9/6/25 2:17 AM, Stefano Stabellini wrote:
Hi Leonid,
I was about to commit this but unfortunately it is introducing MISRA
regressions. See:
https://gitlab.com/xen-project/people/sstabellini/xen/-/tree/ppp6?ref_type=heads
https://gitlab.com/xen-project/people/sstabellini/xen/-/jobs/112650051
Hello everyone,
Based on the message from the previous version, the MISRA issues have been
fixed,
and aside from one remaining documentation patch ("docs: arm: add docs for SCMI
over SMC calls forwarding driver"), the patch series appears to be ready.
I believe we can consider including it in 4
Hello Stefano,
On 9/3/25 12:16 AM, Stefano Stabellini wrote:
Hi Oleksii,
We previously discussed the PV_SHIM_EXCLUSIVE build issue on Matrix
and agreed on resolving it after the feature freeze as a fix. This
conversation took place before the feature freeze was rescheduled to
September 5. I am
On 9/1/25 5:55 PM, Jan Beulich wrote:
On 29.08.2025 11:58, Teddy Astie wrote:
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -11,6 +11,7 @@ The format is based on [Keep a
Changelog](https://keepachangelog.com/en/1.0.0/)
- For x86, GCC 5.1 and Binutils 2.25, or Clang/LLVM 11
- For ARM32 and
On 8/29/25 11:58 AM, Teddy Astie wrote:
Signed-off-by: Teddy Astie
---
v2:
- introduced
---
CHANGELOG.md | 1 +
1 file changed, 1 insertion(+)
diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8c4435c181..80a8273d7e 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -34,6 +34,7 @@ The format is
correctly in a way consistent with existing users
(at least with XAPI, xl, libvirt, hvmloader and Linux).
Fixes: 30ce2a9295a5 ("Store an opaque handle (tools uuid) in the domain
structure")
Suggested-by: Andrew Cooper
Signed-off-by: Teddy Astie
LGTM: Acked-by: Oleksii Kuroch
win back,
without the complexity of trying to guess at 1G pages.
Therefore I'd like to request that it be considered for 4.21 at this
juncture.
Such a significant performance increase is a good reason to include this
in 4.21. We also still have enough time to test it properly.
If there are
.
~ Oleksii
On 8/25/25 5:50 PM, Oleksii Kurochko wrote:
Hello community,
I’d like to remind everyone that the Feature Freeze deadline is approaching,
and we still have some outstanding requests from the community for patch series
to be merged into 4.21:
1. Enable guest suspend/resume support on ARM via
On 8/26/25 9:12 PM, Andrew Cooper wrote:
On 25/08/2025 4:50 pm, Oleksii Kurochko wrote:
Hello community,
I’d like to remind everyone that the Feature Freeze deadline is approaching,
and we still have some outstanding requests from the community for patch series
to be merged into 4.21:
1
:
- Ability to enable stack protector
+- GICv3.1 eSPI support
For clarity, I think it would be helpful to add a brief explanation of what
eSPI is
(as you did in the commit message) and also mention “for Xen and guest domains”
or
something similar.
With that:
Acked-by: Oleksii Kurochko
Thanks
+ Penny Zheng
On 8/26/25 7:55 AM, Jan Beulich wrote:
On 25.08.2025 17:50, Oleksii Kurochko wrote:
Hello community,
I’d like to remind everyone that the Feature Freeze deadline is approaching,
and we still have some outstanding requests from the community for patch series
to be merged into
Hello community,
I’d like to remind everyone that the Feature Freeze deadline is approaching,
and we still have some outstanding requests from the community for patch series
to be merged into 4.21:
1. Enable guest suspend/resume support on ARM via vPSCI [1]
2. Introduce SCI SCMI SMC multi-agent
On 8/24/25 12:26 AM, Petr Beneš wrote:
From: Petr Beneš
Signed-off-by: Petr Beneš
Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
---
CHANGELOG.md | 1 +
1 file changed, 1 insertion(+)
diff --git a/CHANGELOG.md b/CHANGELOG.md
index 271ac73a0a..2fd65b90a9 100644
--- a/CHANGELOG.md
+++ b
On 8/11/25 3:25 PM, Jan Beulich wrote:
+ * The page_order will correspond to the order of the mapping in the page
+ * table (i.e it could be a superpage).
+ *
+ * If the entry is not present, INVALID_MFN will be returned and the
+ * page_order will be set according to the order of the invalid ra
in Cirrus CI.
+ - PVH xenstore-stubdom now supports Live Update.
LGTM: Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
- On Arm:
- Ability to enable stack protector
On 8/18/25 9:42 AM, Jan Beulich wrote:
On 15.08.2025 16:35, Juergen Gross wrote:
+ Release Manager
While this surely doesn't hurt, my understanding is that bug fixes don't
require release-acks just yet.
Yes, your understanding is correct.
~ Oleksii
On 15.08.25 16:32, Juergen Gross wrote:
ch
---
v2: Rename the function used in common code.
---
The new name is chosen such that, down the road, offlining of non-RAM
could in principle also become possible.
I think it could be useful to put in commit message.
LGTM: Reviewed-by: Oleksii Kurochko
~ Oleksii
--- a/xen/arch/arm/mm.c
+++
On 8/18/25 10:31 AM, Jan Beulich wrote:
On 15.08.2025 12:27, Penny Zheng wrote:
In order to fix CI error of a randconfig picking both PV_SHIM_EXCLUSIVE=y and
HVM=y results in hvm.c being built, but domctl.c not being built, which leaves
a few functions, like domctl_lock_acquire/release() undefi
On 8/15/25 2:50 PM, Jan Beulich wrote:
On 15.08.2025 11:52, Oleksii Kurochko wrote:
On 8/5/25 6:04 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
+static inline void p2m_write_pte(pte_t *p, pte_t pte, bool clean_pte)
+{
+write_pte(p, pte);
+if ( clean_pte
On 8/14/25 5:17 PM, Jan Beulich wrote:
On 14.08.2025 17:09, Oleksii Kurochko wrote:
On 8/6/25 5:55 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
+/* Put any references on the page referenced by pte. */
+static void p2m_put_page(const pte_t pte, unsigned int level
On 8/5/25 6:04 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
This patch introduces p2m_set_range() and its core helper p2m_set_entry() for
Nit: This patch doesn't introduce p2m_set_range(); it merely fleshes it out.
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen
On 8/6/25 5:55 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/include/asm/p2m.h
+++ b/xen/arch/riscv/include/asm/p2m.h
@@ -79,10 +79,20 @@ typedef enum {
p2m_ext_storage,/* Following types'll be stored outsude PTE
ines to be fair game in the short term.
Agree with that.
Release-Acked-By: Oleksii Kurochko
~ Oleksii
On 8/11/25 5:44 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
RISC-V's PTE has only two available bits that can be used to store the P2M
type. This is insufficient to represent all the current RISC-V P2M types.
Therefore, some P2M types must be stored outside the PTE
On 8/11/25 3:25 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
Introduce helper functions for safely querying the P2M (physical-to-machine)
mapping:
- add p2m_read_lock(), p2m_read_unlock(), and p2m_is_locked() for managing
P2M lock state.
- Implement p2m_get_entry
On 8/11/25 2:50 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
Implement the mfn_valid() macro to verify whether a given MFN is valid by
checking that it falls within the range [start_page, max_page).
These bounds are initialized based on the start and end addresses of RAM
On 8/11/25 2:43 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
Implement put_page(), as it will be used by p2m_put_code().
I would have ack-ed the code change, but the description is irritating:
Who or what is p2m_put_code() (going to be)?
It should be p2m_put_*-related
On 8/11/25 11:56 AM, Andrew Cooper wrote:
On 11/08/2025 9:43 am, Oleksii Kurochko wrote:
On 8/10/25 12:12 AM, Andrew Cooper wrote:
Everything works fine with Debian 13. Provide two new build jobs, and update
both the randconfig the test jobs.
Signed-off-by: Andrew Cooper
---
CC: Anthony
On 8/11/25 1:59 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
Add support for down large memory mappings ("superpages") in the RISC-V
p2m mapping so that smaller, more precise mappings ("finer-grained entries")
can be inserted into lower levels of the
On 8/11/25 1:36 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/p2m.c
+++ b/xen/arch/riscv/p2m.c
@@ -1,3 +1,4 @@
+#include
#include
#include
#include
@@ -197,6 +198,18 @@ static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m,
gfn_t gfn
On 8/11/25 9:28 AM, Jan Beulich wrote:
On 08.08.2025 15:46, Oleksii Kurochko wrote:
On 8/5/25 5:20 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
+/* Unlock the flush and do a P2M TLB flush if necessary */
+void p2m_write_unlock(struct p2m_domain *p2m
On 8/10/25 12:12 AM, Andrew Cooper wrote:
I know it's past the last-post deadline, but Trixie was only released today.
Lets consider it for 4.21:
Release-Acked-by: Oleksii Kurochko
Thanks.
~ Oleksii
In terms of backports, we should at least go back to the bugfix branches.
Andrew C
Stabellini
CC: Shawn Anastasio
CC: Oleksii Kurochko
CC: Doug Goldstein
CC: Marek Marczykowski-Górecki
CC: Victor Lira
https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1975929387
---
automation/gitlab-ci/build.yaml | 22 ++
automation/gitlab-ci/test.yaml | 2 +-
2
On 8/8/25 4:56 PM, Anthony PERARD wrote:
From: Anthony PERARD
Signed-off-by: Anthony PERARD
LGTM: Acked-by: Oleksii Kurochko
With one question ...
---
CHANGELOG.md | 2 ++
README | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/CHANGELOG.md b/CHANGELOG.md
On 8/5/25 5:20 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
Implement map_regions_p2mt() to map a region in the guest p2m with
a specific p2m type. The memory attributes will be derived from the
p2m type. This function is going to be called from dom0less common
code.
s
On 8/7/25 5:57 PM, Jan Beulich wrote:
On 07.08.2025 15:35, Oleksii Kurochko wrote:
On 8/5/25 12:43 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
+static int p2m_alloc_root_table(struct p2m_domain *p2m)
+{
+struct domain *d = p2m->domain;
+struct page_info *p
On 8/5/25 4:11 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -12,6 +12,7 @@
#include
#include
+#include
#include
#include
@@ -247,9 +248,17 @@ static inline bool
On 8/6/25 10:12 AM, Jan Beulich wrote:
On 06.08.2025 09:45, Oleksii Kurochko wrote:
On 8/6/25 8:05 AM, Jan Beulich wrote:
Overall: There are very many items on this list, and it seems entirely clear to
me that not all of them will make it. I think it would be quite helpful to strip
down the
On 8/7/25 5:30 PM, Jan Beulich wrote:
On 07.08.2025 14:00, Oleksii Kurochko wrote:
On 8/5/25 12:37 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
+/*
+ * Return back nr_root_pages to assure the root table memory is also
+ * accounted against the P2M pool of
On 8/4/25 4:16 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
- Extended p2m_type_t with additional types: p2m_mmio_direct,
p2m_grant_map_{rw,ro}.
- Added macros to classify memory types: P2M_RAM_TYPES, P2M_GRANT_TYPES.
- Introduced helper predicates: p2m_is_ram
On 8/4/25 4:11 PM, Jan Beulich wrote:
On 31.07.2025 17:58, Oleksii Kurochko wrote:
Rename `p2m_mmio_direct_dev` to a more architecture-neutral alias
`p2m_mmio_direct` to avoid leaking Arm-specific naming into common Xen code,
such as dom0less passthrough property handling.
This helps reduce
On 8/7/25 12:11 PM, Jan Beulich wrote:
+unsigned long old;
+
+/* Figure-out number of VMID bits in HW */
+old = csr_read(CSR_HGATP);
+
+csr_write(CSR_HGATP, old | HGATP_VMID_MASK);
+vmid_bits = csr_read(CSR_HGATP);
+vmid_bits = MASK_EXTR(vmid_bits, HGATP_VMID_MASK);
Nit
On 8/7/25 2:50 PM, Mykola Kvach wrote:
Hi Oleksii,
Hello Mykola,
=== ARM ===
* [4.21?] MPU mm subsistem skeleton
- Luca Fancellu
-
https://lore.kernel.org/xen-devel/20250312135258.1815706-1-luca.fance...@arm.com/
-https://patchew.org/Xen/20250312135258.1815706-1-luca.fance...@a
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