On 21.05.2025 19:24, Alejandro Vallejo wrote:
> On Wed May 21, 2025 at 5:00 PM CEST, Jan Beulich wrote:
>> On 29.04.2025 14:36, Alejandro Vallejo wrote:
>>> --- a/xen/common/domain-builder/fdt.c
>>> +++ b/xen/common/domain-builder/fdt.c
>>> @@ -13,6 +13,36 @@
>>>
>>> #include "fdt.h"
>>>
>>> +
On 22.05.2025 07:59, Penny, Zheng wrote:
> [Public]
>
>> -Original Message-
>> From: Jan Beulich
>> Sent: Wednesday, April 30, 2025 11:02 PM
>> To: Penny, Zheng
>> Cc: Huang, Ray ; Andrew Cooper
>> ; Roger Pau Monné ; xen-
>> [email protected]
>> Subject: Re: [PATCH v4 15/15] xe
> On 21 May 2025, at 18:53, Jens Wiklander wrote:
>
> Hi Bertrand,
>
> On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
> wrote:
>>
>> Add support for indirect messages between VMs.
>> This is only enabled if CONFIG_FFA_VM_TO_VM is selected.
>>
>> Signed-off-by: Bertrand Marquis
>> ---
>>
Hi Jens,
> On 21 May 2025, at 18:34, Jens Wiklander wrote:
>
> Hi,
>
> On Wed, May 21, 2025 at 5:11 PM Bertrand Marquis
> wrote:
>>
>> Hi Jens,
>>
>>> On 21 May 2025, at 16:54, Jens Wiklander wrote:
>>>
>>> Hi Bertrand,
>>>
>>> On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
>>> wrote:
On 22.05.2025 02:25, Stefano Stabellini wrote:
> On Mon, 19 May 2025, Oleksii Moisieiev wrote:
>> +ret = dt_find_node_by_gpath(domctl->u.assign_device.u.dt.path,
>> +domctl->u.assign_device.u.dt.size,
>> &dev);
>> +if ( ret )
>> +retu
[Public]
> -Original Message-
> From: Jan Beulich
> Sent: Wednesday, April 30, 2025 11:02 PM
> To: Penny, Zheng
> Cc: Huang, Ray ; Andrew Cooper
> ; Roger Pau Monné ; xen-
> [email protected]
> Subject: Re: [PATCH v4 15/15] xen/xenpm: Adapt SET/GET_CPUFREQ_CPPC
> xen_sysctl_pm_o
On 2025/5/21 19:23, Roger Pau Monné wrote:
> On Wed, May 21, 2025 at 07:00:37AM +, Chen, Jiqian wrote:
>> On 2025/5/20 17:43, Roger Pau Monné wrote:
>>> On Tue, May 20, 2025 at 11:14:27AM +0200, Jan Beulich wrote:
On 20.05.2025 11:09, Roger Pau Monné wrote:
> On Tue, May 20, 2025 at 08
On Tue, May 20, 2025 at 08:20:16AM +0200, Jan Beulich wrote:
> On 19.05.2025 22:12, [email protected] wrote:
> > --- a/xen/arch/arm/vpl011.c
> > +++ b/xen/arch/arm/vpl011.c
> > @@ -78,12 +78,11 @@ static void vpl011_write_data_xen(struct domain *d,
> > uint8_t data)
> > unsigned long flags;
> >
On Wed, May 21, 2025 at 05:07:12PM +0200, Roger Pau Monné wrote:
> On Fri, May 16, 2025 at 02:29:16AM +, [email protected] wrote:
> > From: Denis Mukhin
> >
> > Rewrite emulation_flags_ok() to simplify future modifications.
> >
> > Also, introduce X86_EMU_{BASELINE,OPTIONAL} helper macros.
> >
>
On Wed, May 21, 2025 at 10:02:52AM +0200, Jan Beulich wrote:
> On 21.05.2025 02:00, [email protected] wrote:
> > --- a/xen/common/domain.c
> > +++ b/xen/common/domain.c
> > @@ -66,6 +66,11 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
> > static struct domain *domain_hash[DOMAIN_HASH_SIZE];
> > struc
On Mon, 19 May 2025, Oleksii Moisieiev wrote:
> From: Grygorii Strashko
>
> Add chained handling of assigned DT devices to support access-controller
> functionality through SCI framework, so DT device assign request can be
> passed to FW for processing and enabling VM access to requested device
>
On Wed, May 21, 2025 at 09:31:34AM +0200, Jan Beulich wrote:
> On 21.05.2025 02:00, [email protected] wrote:
> > --- a/xen/arch/arm/tee/ffa.c
> > +++ b/xen/arch/arm/tee/ffa.c
> > @@ -331,10 +331,9 @@ static int ffa_domain_init(struct domain *d)
> > * reserved for the hypervisor and we only supp
On 21/05/2025 10:18 pm, [email protected] wrote:
> From: Denis Mukhin
>
> The existing argo test depends on xenstore to retrieve the domain ID.
>
> Also, test does not perform peer-to-peer communication using Argo hypercall,
> it
> communicates with itself.
>
> Since xenstore currently runs in dom0
From: Denis Mukhin
The existing argo test depends on xenstore to retrieve the domain ID.
Also, test does not perform peer-to-peer communication using Argo hypercall, it
communicates with itself.
Since xenstore currently runs in dom0, xenstore adds unnecessary dependency on
dom0 for the test in
The patch series integrates an XTF argo test available at [1].
Patch 1 is the original test.
Patch 2 adds fixups to run the test under QEMU environment in gitlab CI.
[1]
https://github.com/dozylynx/meta-argo/blob/master/recipes-extended/xen/xtf/0001-Add-Argo-test.patch
[2] Link to v1:
https://l
From: Christopher Clark
From: Christopher Clark
Simple test cases for the four Argo operations, register, unregister,
sendv and notify exercised with a single test domain.
Add infrastructure to access Argo: a 5-argument hypercall, number 39.
Signed-off-by: Christopher Clark
Signed-off-by: Den
On Wed, 21 May 2025, Jan Beulich wrote:
> On 21.05.2025 16:35, Alejandro Vallejo wrote:
> > I think we should aim to share binding code wherever possible, using common
> > datastructures (kernel_info and bootmodule) as dumping ground for the
> > results
> > of the binding parsing functions. I seek
On Wed, 21 May 2025, Christopher Clark wrote:
> Adding Daniel P. Smith as a reviewer.
>
> Signed-off-by: Christopher Clark
Acked-by: Stefano Stabellini
> ---
> since v1: add to R: role
>
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> inde
On Wed, 21 May 2025, Julien Grall wrote:
> > For static dom0less flows, we can do the same as for xl flows but we have
> > the
> > additional problem of domU's PCI bus enumeration racing with QEMU.
> > On x86, when domU's access a memory range that has not yet got IOREQ's
> > connected to it, the a
On 21/05/2025 2:01 am, Christopher Clark wrote:
> On Tue, May 20, 2025 at 3:10 PM Andrew Cooper
> wrote:
>
> Treat "argo" on the command line as a positive boolean, rather
> than requiring
> the user to pass "argo=1/on/enable/true".
>
> Move both opt_argo* variables into __ro_after
On Wed, 21 May 2025, Bertrand Marquis wrote:
> Hi Edgar,
>
> > On 20 May 2025, at 10:04, Edgar E. Iglesias wrote:
> >
> > Hi all,
> >
> > Following up on the ARM virtio-pci series I posted a while back ago.
> >
> > There have been some concerns around the delayed and silent apperance of
> > de
On 2025-05-21 21:43, Andrew Cooper wrote:
On 21/05/2025 8:21 pm, Nicola Vetrini wrote:
On 2025-05-21 20:00, Andrew Cooper wrote:
On 21/05/2025 3:36 pm, Andrew Cooper wrote:
diff --git a/xen/arch/x86/include/asm/msr.h
b/xen/arch/x86/include/asm/msr.h
index 0d3b1d637488..4c4f18b3a54d 100644
---
On 21/05/2025 8:48 pm, Nicola Vetrini wrote:
> On 2025-05-21 21:43, Andrew Cooper wrote:
>> On 21/05/2025 8:21 pm, Nicola Vetrini wrote:
>>> On 2025-05-21 20:00, Andrew Cooper wrote:
On 21/05/2025 3:36 pm, Andrew Cooper wrote:
> diff --git a/xen/arch/x86/include/asm/msr.h
> b/xen/arch/
On 21/05/2025 8:21 pm, Nicola Vetrini wrote:
> On 2025-05-21 20:00, Andrew Cooper wrote:
>> On 21/05/2025 3:36 pm, Andrew Cooper wrote:
>>> diff --git a/xen/arch/x86/include/asm/msr.h
>>> b/xen/arch/x86/include/asm/msr.h
>>> index 0d3b1d637488..4c4f18b3a54d 100644
>>> --- a/xen/arch/x86/include/asm
On 2025-05-21 20:00, Andrew Cooper wrote:
On 21/05/2025 3:36 pm, Andrew Cooper wrote:
diff --git a/xen/arch/x86/include/asm/msr.h
b/xen/arch/x86/include/asm/msr.h
index 0d3b1d637488..4c4f18b3a54d 100644
--- a/xen/arch/x86/include/asm/msr.h
+++ b/xen/arch/x86/include/asm/msr.h
@@ -69,20 +69,20 @
On 21/05/2025 5:55 pm, Roger Pau Monne wrote:
> With the current AP bring up code Xen can get stuck indefinitely if an AP
You want a comma between "code, Xen" to make the sentence easier to parse.
> freezes during boot after the 'callin' step. Introduce a 10s timeout while
> waiting for APs to f
On 21/05/2025 3:36 pm, Andrew Cooper wrote:
> diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h
> index 0d3b1d637488..4c4f18b3a54d 100644
> --- a/xen/arch/x86/include/asm/msr.h
> +++ b/xen/arch/x86/include/asm/msr.h
> @@ -69,20 +69,20 @@ static inline void wrmsr_ns(uint32
On 5/21/25 11:31, Daniel P. Smith wrote:
As for 3, I can repost my original analysis that went to the working
group on why using this is not the best idea. Doing 3 would require
doing at least two, if not three passes on the DTB for x86 with zero
benefit/need since, unlike Arm, we never have t
On Wed May 21, 2025 at 5:00 PM CEST, Jan Beulich wrote:
> On 29.04.2025 14:36, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith"
>>
>> Add the ability to detect both a formal hyperlaunch device tree or a dom0less
>> device tree. If the hyperlaunch device tree is found, then count the number
>>
On 21/05/2025 5:55 pm, Roger Pau Monne wrote:
> Print the CPU ID that fails to respond to the init sequence, or that didn't
> manage to reach the "callin" state. Expand a bit the printed error
> messages. Otherwise the "Not responding." message is not easy to
> understand by users.
>
> Reported-b
Hello,
Both patches attempt to improve AP boot failure diagnosis by improving
the printed failure messages (patch 1) and detecting AP getting stuck
during bringup (patch 2). They should be non-functional changes for
systems working correctly.
Thanks, Roger.
Roger Pau Monne (2):
x86/boot: prin
Print the CPU ID that fails to respond to the init sequence, or that didn't
manage to reach the "callin" state. Expand a bit the printed error
messages. Otherwise the "Not responding." message is not easy to
understand by users.
Reported-by: Andrew Cooper
Signed-off-by: Roger Pau Monné
---
xe
With the current AP bring up code Xen can get stuck indefinitely if an AP
freezes during boot after the 'callin' step. Introduce a 10s timeout while
waiting for APs to finish startup.
On failure of an AP to complete startup send an NMI to trigger the printing
of a stack backtrace on the stuck AP
Hi Bertrand,
On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
wrote:
>
> Add support for indirect messages between VMs.
> This is only enabled if CONFIG_FFA_VM_TO_VM is selected.
>
> Signed-off-by: Bertrand Marquis
> ---
> Changes in v5:
> - Prevent potential overflow in send2 handling (Julien)
Hi,
On Wed, May 21, 2025 at 5:11 PM Bertrand Marquis
wrote:
>
> Hi Jens,
>
> > On 21 May 2025, at 16:54, Jens Wiklander wrote:
> >
> > Hi Bertrand,
> >
> > On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
> > wrote:
> >>
> >> Create a CONFIG_FFA_VM_TO_VM parameter to activate FFA communication
Introduce support for IRQ setup on RISC-V by implementing setup_irq() and
__setup_irq(), adapted and extended from an initial implementation by [1].
__setup_irq() does the following:
- Sets up an IRQ action.
- Validates that shared IRQs have non-NULL `dev_id` and are only used when
existin
Introduce the intc_hw_operations structure to encapsulate interrupt
controller-specific data and operations. This structure includes:
- A pointer to interrupt controller information (`intc_info`)
- Callbacks to initialize the controller and set IRQ type/priority
- A reference to an interupt control
Hi Roger,
On 21/05/2025 10:12, Roger Pau Monne wrote:
The current underlying implementation of GNTTABOP_cache_flush on x86 won't
work as expected. The provided {clean,invalidate}_dcache_va_range()
helpers only do a local pCPU cache flush, so the cache of previous pCPUs
where the vCPU might have
platform_get_irq() recieves information about device's irq ( type
and irq number ) from device tree node and using this information
update irq descriptor in irq_desc[] array.
Introduce dt_irq_xlate and initialize with aplic_irq_xlate() as
it is used by dt_device_get_irq() which is called by
platfo
Introduce intc_init() to initialize the interrupt controller using the
registered hardware ops.
Also add intc_route_irq_to_xen() to route IRQs to Xen, with support for
setting IRQ type and priority via new internal helpers intc_set_irq_type()
and intc_set_irq_priority().
Call intc_init() to do bas
Introduce interrupt controller descriptor for host APLIC to describe
the low-lovel hardare. It includes implementation of the following functions:
- aplic_irq_startup()
- aplic_irq_enable()
- aplic_irq_disable()
- aplic_set_irq_affinity()
As APLIC is used in MSI mode it requires to enable/disa
Implements dt_processor_hartid() to get the hart ID of the given
device tree node and do some checks if CPU is available and given device
tree node has proper riscv,isa property.
As a helper function dt_get_hartid() is introduced to deal specifically
with reg propery of a CPU device node.
Signed-
Initialize cpu_{possible, online}_map by using smp_prepare_boot_cpu().
Drop DEFINE_PER_CPU(unsigned int, cpu_id) from stubs.c as this variable isn't
expected to be used in RISC-V at all.
Move declaration of cpu_{possible,online}_map from stubs.c to smpboot.c
as now smpboot.c is now introduced.
Ot
Update Kconfig to select GENERIC_UART_INIT for basic UART init ( find a dt node
and call device specific device_init() ).
Drop `default n if RISCV` statement for config HAS_NS16550 as now ns16550 is
ready to be compiled and used by RISC-V. Also, make the config user selectable
for everyone except
Implement functions necessarry to have working external interrupts in
hypervisor mode. The following changes are done:
- Add a common function intc_handle_external_irq() to call APLIC specific
function to handle an interrupt.
- Update do_trap() function to handle IRQ_S_EXT case; add the che
Svpbmt extension is necessary for chaning the memory type for a page contains
a combination of attributes that indicate the cacheability, idempotency,
and ordering properties for access to that page.
As a part of the patch the following is introduced:
- Svpbmt memory type defintions: PTE_PBMT_{NOC
Introduce ioremap_attr() as a shared helper to implement architecture-specific
ioremap variants:
- ioremap_cache()
- ioremap_wc()
These functions use __vmap() internally and apply appropriate memory attributes
for RISC-V.
These functions are implemned not as static inline function or macros as it
Implement init_IRQ() to initalize various IRQs.
Currently, this function initializes the irq_desc[] array,
which stores IRQ descriptors containing various information
about each IRQ, such as the type of hardware handling, whether
the IRQ is disabled, etc.
The initialization is basic at this point
aplic_init() function does the following few things:
- checks that IMSIC in device tree node ( by checking msi-parent property
in APLIC node ) is present as current one implmenetaion of AIA is
supported only MSI method.
- initialize IMSIC based on IMSIC device tree node
- Read value of AP
imsic_init() is introduced to parse device tree node, which has the following
bindings [2], and based on the parsed information update IMSIC configuration
which is stored in imsic_cfg.
The following helpers are introduces for imsic_init() usage:
- imsic_parse_node() parses IMSIC node from DTS
The patch series introduces basic UART support (in interrupt mode) and support
of
interrupts for hypervisor mode.
To implement this the following has been added:
- APLIC and IMISC initialization.
- Introduce of intc_hw_operations abstraction.
- Introduce some APLIC and IMSIC operations.
- Introdu
Hi Roger,
On 16/05/2025 09:31, Roger Pau Monne wrote:
For once the message printed when a BAR overlaps with a non-hole regions is
not accurate on x86. While the BAR won't be mapped by the vPCI logic, it
is quite likely overlapping with a reserved region in the memory map, and
already mapped as
On 21/05/2025 4:45 pm, Jan Beulich wrote:
> On 13.05.2025 19:05, Sergii Dmytruk wrote:
>> +/* SLR defined architectures */
>> +#define SLR_INTEL_TXT 1
>> +#define SLR_AMD_SKINIT 2
> These are both x86, yet the header is put in the common include dir?
ARM have a DRTM technology in progress, whic
On 13.05.2025 19:05, Sergii Dmytruk wrote:
> The file provides constants, structures and several helper functions for
> parsing SLRT.
>
> Signed-off-by: Ross Philipson
> Signed-off-by: Sergii Dmytruk
> ---
> xen/include/xen/slr-table.h | 268
> 1 file change
Greetings,
Per my response to Allejandro's message, here is the response sent the
the DTB working group formed last year to discuss DTB parsing for x86.
Original Message:
I have copied everyone that attended the hyperlaunch working group a few
weeks back to ensure everyone has a chance to r
On 5/21/25 10:35, Alejandro Vallejo wrote:
Hi,
(There's a TL;DR at the end)
While working on preparing and reworking the hyperlaunch series for
upstreaming it's slowly becoming apparent the degree of duplication with
dom0less.
Yes, this was by design so that when we got to the point of conver
On 29.04.2025 14:36, Alejandro Vallejo wrote:
> From: "Daniel P. Smith"
>
> Add the ability to detect both a formal hyperlaunch device tree or a dom0less
> device tree. If the hyperlaunch device tree is found, then count the number of
> domain entries, reporting an error if more than one is found
On Wed, May 21, 2025 at 04:31:33PM +0200, Jan Beulich wrote:
> On 21.05.2025 13:34, Roger Pau Monné wrote:
> > On Wed, May 21, 2025 at 10:29:26AM +0200, Jan Beulich wrote:
> >> On 16.05.2025 10:31, Roger Pau Monne wrote:
> >>> For once the message printed when a BAR overlaps with a non-hole regions
On 13.05.2025 19:05, Sergii Dmytruk wrote:
> From: Krystian Hebel
>
> The file contains TXT register spaces base address, registers offsets,
> error codes and inline functions for accessing structures stored on
> TXT heap.
>
> Signed-off-by: Krystian Hebel
> Signed-off-by: Sergii Dmytruk
> ---
Hi Jens,
> On 21 May 2025, at 16:54, Jens Wiklander wrote:
>
> Hi Bertrand,
>
> On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
> wrote:
>>
>> Create a CONFIG_FFA_VM_TO_VM parameter to activate FFA communication
>> between VMs.
>> When activated list VMs in the system with FF-A support in pa
On Fri, May 16, 2025 at 02:29:16AM +, [email protected] wrote:
> From: Denis Mukhin
>
> Rewrite emulation_flags_ok() to simplify future modifications.
>
> Also, introduce X86_EMU_{BASELINE,OPTIONAL} helper macros.
>
> No functional change intended.
>
> Signed-off-by: Denis Mukhin
> ---
> Ch
On 14.05.2025 16:55, Andrew Cooper wrote:
> On 13/05/2025 6:05 pm, Sergii Dmytruk wrote:
>> +/*
>> + * Always use private space as some of registers are either read-only or not
>> + * present in public space.
>> + */
>> +static inline uint64_t read_txt_reg(int reg_no)
>
> unsigned int reg
>
> I'd
Hi Bertrand,
On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
wrote:
>
> Create a CONFIG_FFA_VM_TO_VM parameter to activate FFA communication
> between VMs.
> When activated list VMs in the system with FF-A support in part_info_get.
>
> When VM to VM is activated, Xen will be tainted as Insecure
On 21.05.2025 16:36, Andrew Cooper wrote:
> This avoids needing to hold rc in a register across the WRMSR, and in most
> cases removes direct testing and branching based on rc, as the fault label can
> be rearranged to directly land on the out-of-line block.
>
> No functional change.
>
> Resolves
On 21.05.2025 16:36, Andrew Cooper wrote:
> Switch to using a mnemonic, and asm_inline as there's EXTABLE metadata.
>
> Update the types, and adjust parameter names. The name xfeatures is specific
> to xcr0, so rename to val to be more generic, even if there isn't another
> writeable xcr yet.
>
On 21.05.2025 16:35, Alejandro Vallejo wrote:
> I think we should aim to share binding code wherever possible, using common
> datastructures (kernel_info and bootmodule) as dumping ground for the results
> of the binding parsing functions. I seek agreement on the following 3 points
> for the end go
This avoids needing to hold rc in a register across the WRMSR, and in most
cases removes direct testing and branching based on rc, as the fault label can
be rearranged to directly land on the out-of-line block.
No functional change.
Resolves: https://gitlab.com/xen-project/xen/-/work_items/214
Si
Switch to using a mnemonic, and asm_inline as there's EXTABLE metadata.
Update the types, and adjust parameter names. The name xfeatures is specific
to xcr0, so rename to val to be more generic, even if there isn't another
writeable xcr yet.
No functional change.
Resolves: https://gitlab.com/xe
Hi,
(There's a TL;DR at the end)
While working on preparing and reworking the hyperlaunch series for
upstreaming it's slowly becoming apparent the degree of duplication with
dom0less.
Oleksii's latest effort to move all that code into common[*] (see
ad03faa942b9("xen/common: dom0less: make some.
On 21.05.2025 13:34, Roger Pau Monné wrote:
> On Wed, May 21, 2025 at 10:29:26AM +0200, Jan Beulich wrote:
>> On 16.05.2025 10:31, Roger Pau Monne wrote:
>>> For once the message printed when a BAR overlaps with a non-hole regions is
>>> not accurate on x86. While the BAR won't be mapped by the vP
Hi,
Thanks for the proposal.
On Wed, May 14, 2025 at 07:12:48AM +, Sookyung Ahn wrote:
> I am writing to propose an enhancement to the `xen-tools` for users who
> require only a minimal subset of its functionality, particularly in
> safety-critical domains like aerospace.
FYI, there's a pr
On 21.05.2025 13:40, Oleksii Kurochko wrote:
> On 5/15/25 12:08 PM, Jan Beulich wrote:
>> On 12.05.2025 17:55, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/Makefile
>>> +++ b/xen/arch/riscv/Makefile
>>> @@ -1,5 +1,6 @@
>>> obj-y += aplic.o
>>> obj-y += cpufeature.o
>>> +obj-y += dom0less-bu
On Fri, May 16, 2025 at 02:29:09AM +, [email protected] wrote:
> From: Denis Mukhin
>
> Define per-architecture emulation_flags for configuring domain emulation
> features.
>
> Print d->arch.emulation_flags from 'q' keyhandler for better traceability
> while debugging.
>
> Signed-off-by: Deni
Hi,
I've been looking at clock drift problem we've been having in Windows VMs
which seems to come down to whether the time_ref_count enlightenment is
enabled for the guest. For migration compatibility reasons we had the
list expanded to:
viridian = ['base', 'freq', 'time_ref_count', 'apic_assist
Hi Bertrand,
On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
wrote:
>
> This patch is in preparation for VM to VM support in order to do the
> changes on the SP handling part of partinfo_get before adding support
> for the VM part.
>
> This patches is doing the following changes:
> - split parti
On Tue, Apr 08, 2025 at 03:23:13PM +0200, Marek Marczykowski-Górecki wrote:
> Consider also "Display controller" an IGD, not only "VGA compatible
> controller" in few more places.
>
> Fixes: 4191619e0893 ("libxl: extend IGD check")
> Signed-off-by: Marek Marczykowski-Górecki
> ---
> Do you prefer
On Tue, May 13, 2025 at 11:44:19AM -0400, Jason Andryuk wrote:
> Only access the HVM union b_info->u.hvm on HVM guests. The union
> access is not guarded, so this reads and sets the default even on
> non-HVM guests. Usually this doesn't matter as PV and PVH unions are
> smaller and zero-initializ
Hi Bertrand,
On Wed, Apr 16, 2025 at 9:40 AM Bertrand Marquis
wrote:
>
> Add a new command line parameter "tee=" to be used to explicitly select
> what tee mediator is to be used by Xen and fail if it does not exist
> or the probe function for it failed.
>
> Without specifying which tee is to be
From: Oleksandr Andrushchenko
PCI host bridges often have different ways to access the root and child
bus configuration spaces. One of the examples is Designware's host bridge
and its multiple clones [1].
Linux kernel implements this by instantiating a child bus when device
drivers provide not o
Hi Edgar,
Thanks for the write-up.
On 20/05/2025 09:04, Edgar E. Iglesias wrote:
Hi all,
Following up on the ARM virtio-pci series I posted a while back ago.
There have been some concerns around the delayed and silent apperance of
devices on the ECAM area. The spec is not super clear wether t
From: Oleksandr Andrushchenko
Add support for Renesas R-Car Gen4 PCI host controller, specifically
targeting the S4 and V4H SoCs. The implementation includes configuration
read/write operations for both root and child buses. For accessing the
child bus, iATU is used for address translation.
The
From: Oleksandr Andrushchenko
Some of the PCI host bridges require private data. Add priv field
to struct pci_host_bridge, so such bridges may populate it with
their private data.
Signed-off-by: Oleksandr Andrushchenko
Signed-off-by: Mykyta Poturai
Reviewed-by: Stefano Stabellini
---
v4->v5:
From: Oleksandr Andrushchenko
Some of the PCI host bridges require additional processing during the
probe phase. For that they need to access struct bridge of the probed
host, so return pointer to the new bridge from pci_host_common_probe.
Signed-off-by: Oleksandr Andrushchenko
Signed-off-by: M
This series adds support for R-Car Gen4 PCI host controller.
To fully support the controller, the following changes were made:
- Generic mechanism to support PCI child buses is added.
- Private data for PCI host bridge and means to access it are added.
The series was tested as a part of the pci-p
Hi Ayan,
> On 9 May 2025, at 13:24, Ayan Kumar Halder wrote:
>
> Define requirements for specific commands.
>
> Signed-off-by: Ayan Kumar Halder
> ---
> Changes from -
>
> v1 - 1. Reworded the requirement so as to avoid mentioining variable names
> or hardcoded strings. Otherwise, one would n
Hi Ayan,
> On 9 May 2025, at 13:24, Ayan Kumar Halder wrote:
>
> Define the requirements which are common for all the commands for XEN_VERSION
> hypercall.
>
> Signed-off-by: Ayan Kumar Halder
> ---
> Changes from -
>
> v1 - 1. Fixed `XenProd~version_hyp_ret_val~1` requirement as Xen does not
Hi Edgar,
> On 20 May 2025, at 10:04, Edgar E. Iglesias wrote:
>
> Hi all,
>
> Following up on the ARM virtio-pci series I posted a while back ago.
>
> There have been some concerns around the delayed and silent apperance of
> devices on the ECAM area. The spec is not super clear wether this i
On 5/15/25 12:08 PM, Jan Beulich wrote:
On 12.05.2025 17:55, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -1,5 +1,6 @@
obj-y += aplic.o
obj-y += cpufeature.o
+obj-y += dom0less-build.o
Arm uses
obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o
Hi Denis,
On 5/16/25 9:50 PM, [email protected] wrote:
Hi Oleksii,
On Mon, May 12, 2025 at 05:55:21PM +0200, Oleksii Kurochko wrote:
This is the first step toward supporting a vSBI UART.
The implementation checks for the presence of the "vsbi_uart" property
in the device tree. If present, the v
On Wed, May 21, 2025 at 10:29:26AM +0200, Jan Beulich wrote:
> On 16.05.2025 10:31, Roger Pau Monne wrote:
> > For once the message printed when a BAR overlaps with a non-hole regions is
> > not accurate on x86. While the BAR won't be mapped by the vPCI logic, it
> > is quite likely overlapping wi
On Wed, May 21, 2025 at 07:00:37AM +, Chen, Jiqian wrote:
> On 2025/5/20 17:43, Roger Pau Monné wrote:
> > On Tue, May 20, 2025 at 11:14:27AM +0200, Jan Beulich wrote:
> >> On 20.05.2025 11:09, Roger Pau Monné wrote:
> >>> On Tue, May 20, 2025 at 08:40:28AM +0200, Jan Beulich wrote:
> On 0
Adding Daniel P. Smith as a reviewer.
Signed-off-by: Christopher Clark
---
since v1: add to R: role
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c11b82eca9..517143075d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -222,6 +222,7 @@ F: tools/lib
On Wed, May 21, 2025 at 8:12 AM Jan Beulich wrote:
> On 21.05.2025 01:32, Christopher Clark wrote:
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -226,6 +226,7 @@ S:Maintained
> > F: xen/include/public/argo.h
> > F: xen/include/xen/argo.h
> > F: xen/common/argo.c
> > +F: do
The current underlying implementation of GNTTABOP_cache_flush on x86 won't
work as expected. The provided {clean,invalidate}_dcache_va_range()
helpers only do a local pCPU cache flush, so the cache of previous pCPUs
where the vCPU might have run are not flushed.
However instead of attempting to f
On 29.04.2025 14:36, Alejandro Vallejo wrote:
> @@ -1284,9 +1285,14 @@ void asmlinkage __init noreturn __start_xen(void)
> bi->nr_modules);
> }
>
> -/* Dom0 kernel is always first */
> -bi->mods[0].type = BOOTMOD_KERNEL;
> -bi->domains[0].kernel = &bi->mods[0];
>
The patch 099606a7b2d5 didn't cleanly apply to 5.15 due to the
significant difference in codebases.
I've tried to manually bring it back to 5.15 via some minor conflict
resolution but also invoking the newly introduced API using inverted
logic as the conditional statements present in 5.15 are the
[ Upstream commit 85fcb57c983f423180ba6ec5d0034242da05cc54 ]
When mapping a buffer for DMA via .map_page or .map_sg DMA operations,
there is no need to check the machine frames to be aligned according
to the mapped areas size. All what is needed in these cases is that the
buffer is contiguous at m
On 16.05.2025 10:31, Roger Pau Monne wrote:
> For once the message printed when a BAR overlaps with a non-hole regions is
> not accurate on x86. While the BAR won't be mapped by the vPCI logic, it
> is quite likely overlapping with a reserved region in the memory map, and
> already mapped as by de
On 21.05.2025 02:00, [email protected] wrote:
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -66,6 +66,11 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
> static struct domain *domain_hash[DOMAIN_HASH_SIZE];
> struct domain *domain_list;
>
> +/* Non-system domain ID allocator. */
> +st
On 21.05.2025 02:00, [email protected] wrote:
> --- a/xen/arch/arm/tee/ffa.c
> +++ b/xen/arch/arm/tee/ffa.c
> @@ -331,10 +331,9 @@ static int ffa_domain_init(struct domain *d)
> * reserved for the hypervisor and we only support secure endpoints using
> * FF-A IDs with BIT 15 set to 1 so m
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