Re: [EXTERNAL] Re: GSoC Introduction

2021-05-25 Thread Matthew Joyce
Hi Keith, Thanks very much for your note! I really appreciate hearing that context--it's motivating. Neat that you lived in Austria for so long. What brought you there? It's interesting that you mention getaddrinfo and freeaddrinfo. I found an implementation of them in rtems libbsd, here: https:/

Re: Manually building a BSP from branch 5 of git

2021-05-25 Thread Chris Johns
On 26/5/21 1:18 pm, Vijay Kumar Banerjee wrote: > I found the 5.1 docs version from rtems ftp. This looks like the right one: > https://ftp.rtems.org/pub/rtems/releases/5/5.1/docs/html/user/start/bsp-build.html#manual-bsp-build +1 Chris ___ users mailin

Manually building a BSP from branch 5 of git

2021-05-25 Thread Johnson, Andrew N.
Hi, I’m trying to develop fixes for issues that I’m seeing in some of the powerpc/motorola_powerpc BSPs, and I’m working on the 5 branch (it doesn’t look like those have been fixed on the master branch yet either). I have built the tools and those BSPs before using RSB but now I need to build m

Re: Manually building a BSP from branch 5 of git

2021-05-25 Thread Vijay Kumar Banerjee
Hi Andrew, I found the 5.1 docs version from rtems ftp. This looks like the right one: https://ftp.rtems.org/pub/rtems/releases/5/5.1/docs/html/user/start/bsp-build.html#manual-bsp-build Best regards, Vijay On Tue, May 25, 2021 at 5:27 PM Johnson, Andrew N. wrote: > > Hi, > > I’m trying to deve

Re: [EXTERNAL] Re: GSoC Introduction

2021-05-25 Thread Morgan, Keith S
Hi Matt, This sounds like a great project! Expanding the POSIX compliance for RTEMS will be a great resource for the community. As a point of reference, we were recently investigating the use of open-source messaging libraries on RTEMS. One of our top candidates was nanomsg-next-generation (nn

Fw: xilinx_zynq_zc706 BSP

2021-05-25 Thread Siddons, David
Hi, After a long absence I decided to have another shot at RTEMS for Zynq devices. I chose the zc706 board. Installation using RSB went OK. Building the BSP seemed to go well until this error: /home/peter/development/rtems/5.1/lib/gcc/arm-rtems5/7.5.0/../../../../arm-rtems5/bin/ld: /home/pet

Handling RISC-V32 interrupts and traps, mcause mapping for rtems_interrupt_catch()

2021-05-25 Thread Schweikhardt, Jens (TSPCE3-TL4)
Hello *, I'm trying to install interrupt and trap handlers for interrupts and traps not used by RTEMS 5 on a RISC-V32 rocket chip system. In "Volume II: RISC-V Privileged Architectures" I found "Table 3.6: Machine cause register (mcause) values." listing the interrupts and traps: Interrupt Exce

Re: GSoC Introduction

2021-05-25 Thread Matthew Joyce
Sir, Thanks for the guidance and the tips on psignal() and psiginfo()! I'm on the Newlib list now. I'm still wrapping my head around the workflow for those first steps, but I'll get it down. "Self-propelled" sounds like a good policy! Thankfully our flight was uneventful and the little guy behave