RTEMS for ARM networking

2019-12-03 Thread Fernando Domínguez Pousa
Hi all, I'm recently compiled my rtems for a Xilinx board bsp included in RTEMS. In a future I will add TCP/UDP connections to my application so I just want to assure I did the correct installation. At RTEMS compilation I included the -enable-networking option. I have worked with RTEMS using th

Re: sparc and trap 4 (floating point disabled)

2019-12-03 Thread Sebastian Huber
Hello Jens, in uni-processor configurations a lazy floating-point context switch is done on SPARC. You can search for SPARC_USE_LAZY_FP_SWITCH in the sources. -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +4

Re: sparc and trap 4 (floating point disabled)

2019-12-03 Thread Joel Sherrill
On Tue, Dec 3, 2019 at 8:48 AM Schweikhardt, Jens (TSPCE3-TL4) < jens.schweikha...@tesat.de> wrote: > Hello, world\n > > > > I have a question about the use of trap 4 by RTEMS on Sparc32 (leon3). > > Since our app needs FP, we set the PSR[EF] bit during the boot process > before RTEMS is invoked.

Re: sparc and trap 4 (floating point disabled)

2019-12-03 Thread Jiri Gaisler
Does your application work if you don't use your custom trap handler? In the old days, RTEMS used lazy FPU context switching so FPU disabled traps could happen and were handled by the kernel. Also note that if you use FPU instructions in the Init task, you need a special FPU attribute for it ...

sparc and trap 4 (floating point disabled)

2019-12-03 Thread Schweikhardt, Jens (TSPCE3-TL4)
Hello, world\n I have a question about the use of trap 4 by RTEMS on Sparc32 (leon3). Since our app needs FP, we set the PSR[EF] bit during the boot process before RTEMS is invoked. Since we don't expect the fp_disabled trap (4) to occur, we install a fatal handler for it with rtems_interrupt_ca