Hello,
I am having an issue on running the hello world test as directed on
https://devel.rtems.org/wiki/GSoC/GettingStarted .
Please find below the gdb output for the test using sparc-rtems5.
*** BEGIN OF TEST HELLO WORLD ***
*** TEST VERSION: 5.0.0.bdec62c4d5aa25e5a98b9fafe78936a7beb96a6e
***
On 18/02/2019 18:45, Christian Spindeldreier wrote:
Hello Sebastian,
your changes work for us as well, now we are able to run a clean
version of the altcycv_devkit bsp on our DE10 board.
Thanks for testing.
Extending the BSP documentation helps a lot, but maybe you can add the
definition
Hello Sebastian,
your changes work for us as well, now we are able to run a clean version
of the altcycv_devkit bsp on our DE10 board.
Extending the BSP documentation helps a lot, but maybe you can add the
definition of the u-boot 'loadfdt' variable, does not seem to be defined
in any socfpg
Hello Christian,
I added some basic BSP documentation:
https://docs.rtems.org/branches/master/user/bsps/bsps-arm.html#altera-cyclone-v
On 14/02/2019 13:54, Christian Spindeldreier wrote:
we had to change the BSP_ARM_A9MPCORE_PERIPHCLK frequency to 100 MHz
as this is the frequency the L4 MP c
