The current pmap_enter() implementation always enters PROT_WRITE
mappings as read-only and relies on pmap_fault_fixup() to fix this up.
This is obviously not the intention, since we do go through the
trouble of checking whether we have to do modified bit emulation.
The diff below fixes this.
ok?
On Sun, Aug 07, 2016 at 01:58:06PM +0200, Mark Kettenis wrote:
> The ARMv7 ARM explicitly states that all data caches in the system are
> effectively PIPT. This effectively means that there is no reason to
> clean or invalidate data caches except when:
>
> 1. We need to synchronize the instructi
On Sun, Aug 07, 2016 at 01:58:06PM +0200, Mark Kettenis wrote:
> Further testing, especially on Cortex-A8, would be appreciated.
Works for me. Tested on BeagleBone Black. Kernel compile times remains
pretty much the same, though.
--
db
The ARMv7 ARM explicitly states that all data caches in the system are
effectively PIPT. This effectively means that there is no reason to
clean or invalidate data caches except when:
1. We need to synchronize the instruction cache with the data cache.
2. We change a page to be non-cachable.
3.
