On Sun, Feb 09, 2020 at 06:17:47PM -0800, Anthony Steinhauser wrote:
> In the current implementation of the TAA mitigation if the cpuid_level
> is 6 and it's an Intel CPU, the sefflags_edx variable is used without
> being initialized. If the SEFF0EDX_ARCH_CAP bit is accidentally flipped
> in it, th
On Sun, Feb 09, 2020 at 06:17:47PM -0800, Anthony Steinhauser wrote:
> In the current implementation of the TAA mitigation if the cpuid_level
> is 6 and it's an Intel CPU, the sefflags_edx variable is used without
> being initialized. If the SEFF0EDX_ARCH_CAP bit is accidentally flipped
> in it, th
In the current implementation of the TAA mitigation if the cpuid_level
is 6 and it's an Intel CPU, the sefflags_edx variable is used without
being initialized. If the SEFF0EDX_ARCH_CAP bit is accidentally flipped
in it, the rdmsr on the unimplemented MSR_ARCH_CAPABILITIES index leads
to a #GP fault