Switching the computation of cycles/delaycnt to a proper 64 value math
instead of the '32 bit safe' complex math is likely a good idea.
However I am not completely convinced that switching to 'yield' (current
CPU_BUSY_CYCLE implementation) for every loop of a 'short wait' in the wait
loop makes sen
This structure really should be cache-line aligned, which should prevent it
from spilling across a page boundary.
The powerpc pmap was originally designed to have 8 'way' locks so that
only a single way would get locked, thus (as long as one doesn't have way
more than 8 cores) any core should be
On Wed, Jan 13, 2021 at 9:38 PM Scott Cheloha
wrote:
snip
> Do we need to properly set stathz for each platform in *this* diff?
> Or can it wait?
>
> I was hoping to do a sweep of the tree in a later patch and ensure
> that stathz is non-zero everywhere and simultaneously remove code like
> this:
The 'magic' here was that MD code could choose to implement statclock (and
set stathz appropriately), or MD code could not care about the multiple
statclock/hardclock interfaces into the scheduler. Also some clock drivers
on a platform could enable split hardclock/statclock where others did not.
Ba
could we check that there is not an ESR value that indicates PAN violation
instead of using 'instruction recognition'?
Seems that it would be more reliable.
Thanks
Dale
On Mon, Aug 17, 2020 at 1:30 AM Jonathan Gray wrote:
> On Sat, Aug 15, 2020 at 01:54:34PM +0200, Mark Kettenis wrote:
> > > Da
Enabling PAN is a great idea. I have only skimmed this diff at this point,
but it looks reasonable, with the additional check to catch the PAN
violation in the data abort handler.
Dale
On Sat, Aug 15, 2020 at 6:56 AM Mark Kettenis
wrote:
> > Date: Sat, 15 Aug 2020 20:21:09 +1000
> > From: Jonat
ts);
> case llvm::Triple::NetBSD:
>return new NetBSDTargetInfo(Triple, Opts);
> +case llvm::Triple::OpenBSD:
> + return new OpenBSDTargetInfo(Triple, Opts);
> default:
>return new PPC64TargetInfo(Triple, Opts);
> }
>
Dale Rahn dr...@dalerahn.com
DOS_LABELSECTOR));
> + if (error)
> goto done;
> + offset = DL_BLKOFFSET(lp, partoff + DOS_LABELSECTOR);
>
> dlp = (struct disklabel *)(bp->b_data + offset);
> *dlp = *lp;
>
Dale Rahn dr...@dalerahn.com
ootargs, args, sizeof(bootargs));
> }
>
> void
> Index: lib/libc/arch/aarch64/SYS.h
> ===
> RCS file: /cvs/src/lib/libc/arch/aarch64/SYS.h,v
> retrieving revision 1.1
> diff -u -p -r1.1 SYS.h
> --- lib/libc/arch/aarch64/SYS.h 11 Jan 2017 18:09:24 - 1.1
> +++ lib/libc/arch/aarch64/SYS.h 28 May 2018 09:03:07 -
> @@ -37,7 +37,6 @@
>
> #include "DEFS.h"
> #include
> -#include
>
> #define SYSENTRY(x) \
> .weak _C_LABEL(x); \
>
Dale Rahn dr...@dalerahn.com
copy_src_page;
extern paddr_t copy_dst_page;
+void pagezero_cache(vaddr_t);
+
/*
* Pmap stuff
*/
Dale Rahn dr...@dalerahn.com
e any association to either text or data because the proper use
of it can refer to either text or data eg: bl _C_LABEL(c_func).
Basically it is a relic from the past, it might make sense to just remove
all references to _C_LABEL() at this point and just the symbol itself.
Dale Rahn dr...@dalerahn.com
panic("%s: unable to allocate L1",
> @@ -347,7 +340,7 @@ pmap_vp_enter(pmap_t pm, vaddr_t va, str
>
> vp2 = vp1->vp[VP_IDX1(va)];
> if (vp2 == NULL) {
> - vp2 = pool_get(&pmap_vp_pool, vp_pool_flags);
> + vp2 = pool_get(&pmap_vp_pool, PR_NOWAIT | PR_ZERO);
> if (vp2 == NULL) {
> if ((flags & PMAP_CANFAIL) == 0)
> panic("%s: unable to allocate L2", __func__);
> @@ -358,7 +351,7 @@ pmap_vp_enter(pmap_t pm, vaddr_t va, str
>
> vp3 = vp2->vp[VP_IDX2(va)];
> if (vp3 == NULL) {
> - vp3 = pool_get(&pmap_vp_pool, vp_pool_flags);
> + vp3 = pool_get(&pmap_vp_pool, PR_NOWAIT | PR_ZERO);
> if (vp3 == NULL) {
> if ((flags & PMAP_CANFAIL) == 0)
> panic("%s: unable to allocate L3", __func__);
>
Dale Rahn dr...@dalerahn.com
On Mon, Apr 24, 2017 at 10:18:08PM +0200, Mark Kettenis wrote:
> > Date: Mon, 24 Apr 2017 16:01:39 -0400
> > From: Dale Rahn
> >
> > The below code is set up to attach and identify processors for arm64
> > currently it only identifies model, not cache size, but that
new file mode 100644
index 000..7535522d1ed
--- /dev/null
+++ b/sys/arch/arm64/arm64/cpu.c
@@ -0,0 +1,138 @@
+/* $OpenBSD$ */
+
+/*
+ * Copyright (c) 2016 Dale Rahn
+ * Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se)
+ *
+ * Redistribution and use in source and binary forms, with or
NULL);
> if ((pted != NULL) && (pted->pted_va & PTED_VA_WIRED_M)) {
> pm->pm_stats.wired_count--;
> @@ -1926,7 +1813,7 @@ pmap_setup_avail(uint64_t ram_start, uin
> pmap_avail[0].start = ram_start;
> pmap_avail[0].size = ram_end-ram_start;
>
> - // XXX - support more than one region
> + /* XXX - support more than one region */
> pmap_memregions[0].start = ram_start;
> pmap_memregions[0].end = ram_end;
> pmap_memcount = 1;
> @@ -2056,7 +1943,6 @@ pmap_steal_avail(size_t size, int align,
> struct mem_region *mp;
> long start;
> long remsize;
> - arm_kvm_stolen += size; // debug only
>
> for (mp = pmap_avail; mp->size; mp++) {
> if (mp->size > size) {
> @@ -2074,7 +1960,6 @@ pmap_steal_avail(size_t size, int align,
> }
> panic ("unable to allocate region with size %x align %x",
> size, align);
> - return 0; // XXX - only here because of ifdef
> }
>
> vaddr_t
> @@ -2142,49 +2027,45 @@ pmap_show_mapping(uint64_t va)
> struct pmapvp2 *vp2;
> struct pmapvp3 *vp3;
> struct pte_desc *pted;
> - printf("showing mapping of %llx\n", va);
> struct pmap *pm;
> - if (va & 1ULL << 63) {
> + uint64_t ttbr0, tcr;
> +
> + printf("showing mapping of %llx\n", va);
> +
> + if (va & 1ULL << 63)
> pm = pmap_kernel();
> - } else {
> + else
> pm = curproc->p_vmspace->vm_map.pmap;
> - }
>
> if (pm->have_4_level_pt) {
> printf(" vp0 = %llx off %x\n", pm->pm_vp.l0, VP_IDX0(va)*8);
> vp1 = pm->pm_vp.l0->vp[VP_IDX0(va)];
> - if (vp1 == NULL) {
> + if (vp1 == NULL)
> return;
> - }
> } else {
> vp1 = pm->pm_vp.l1;
> }
> - uint64_t ttbr0, tcr;
> +
> __asm volatile ("mrs %x0, ttbr0_el1" : "=r"(ttbr0));
> __asm volatile ("mrs %x0, tcr_el1" : "=r"(tcr));
> -
> printf(" ttbr0 %llx %llx tcr %llx\n", ttbr0, pm->pm_pt0pa, tcr);
> printf(" vp1 = %llx\n", vp1);
>
> vp2 = vp1->vp[VP_IDX1(va)];
> printf(" vp2 = %llx lp2 = %llx idx1 off %x\n",
> vp2, vp1->l1[VP_IDX1(va)], VP_IDX1(va)*8);
> - if (vp2 == NULL) {
> + if (vp2 == NULL)
> return;
> - }
>
> vp3 = vp2->vp[VP_IDX2(va)];
> printf(" vp3 = %llx lp3 = %llx idx2 off %x\n",
> vp3, vp2->l2[VP_IDX2(va)], VP_IDX2(va)*8);
> - if (vp3 == NULL) {
> + if (vp3 == NULL)
> return;
> - }
>
> pted = vp3->vp[VP_IDX3(va)];
> printf(" pted = %p lp3 = %llx idx3 off %x\n",
> pted, vp3->l3[VP_IDX3(va)], VP_IDX3(va)*8);
> -
> - return;
> }
>
> #define NUM_ASID (1 << 16)
>
Dale Rahn dr...@dalerahn.com
> I didn't encounter any problems running a make build with this change.
> It also slightly improved the build time:
>
> 291m24.74s real 257m59.41s user16m05.09s system
> 286m32.07s real 255m44.31s user15m22.44s system
>
I wanted to see this tested, but given this testing, ok drahn@
Dale Rahn dr...@dalerahn.com
On Tue, Mar 21, 2017 at 04:45:01PM +0100, Mark Kettenis wrote:
> > Date: Tue, 21 Mar 2017 15:57:46 +0100 (CET)
> > From: Mark Kettenis
> >
> > > Date: Mon, 20 Mar 2017 12:26:28 -0400
> > > From: Dale Rahn
> > >
> > > On Mon, Mar 20, 2017 at
On Mon, Mar 20, 2017 at 09:15:09AM -0700, Philip Guenther wrote:
> On Mon, 20 Mar 2017, Dale Rahn wrote:
> ...
> > Including the thread pointer would seem to make sense, but there is there
> > a proc vs process issue there (thread vs p
>
> Uh, the registers are _all_ pe
res.
>
> NetBSD also includes the userland per-thread-register which I think is
> a good idea.
>
Naming and order realistically doesn't matter that much, If it is easier to
move registers around to match a userland structure in process_*regs(),
that is reasonable. That said: the more I have followed NetBSD's lead in the
past, the more I have regretted it later.
Including the thread pointer would seem to make sense, but there is there
a proc vs process issue there (thread vs p
using __uint128_t for FPU is a lot better than the uint64 [64] that is there
now.
Dale Rahn dr...@dalerahn.com
// XXX what to do if switching to kernel pmap !?!?
+ /* switch userland to empty mapping page */
+ cpu_setttb(pted_kernel_ttbr0);
}
}
Dale Rahn dr...@dalerahn.com
id(pm);
- }
-
- if (pm != pmap_kernel())
- pcb->pcb_pagedir = ((uint64_t)pm->pm_asid << 48) | pm->pm_pt0pa;
-
psw = disable_interrupts();
if (p == curproc && pm != pmap_kernel() && pm != curcpu()->ci_curpm) {
(jb) == 0) {
- *((int *)0L) = 0;
+ *((volatile int *)0L) = 0;
return (1);
}
return (0);
Dale Rahn dr...@dalerahn.com
On Thu, Feb 23, 2017 at 01:03:57PM +1100, Jonathan Gray wrote:
> On Wed, Feb 22, 2017 at 06:45:52PM -0500, Dale Rahn wrote:
> > Add psci 2.0 features to spin up/down/suspend processors.
> >
> > This change uses extern weak symbols to determine if the platform supports
&
, x1, [sp], #32
-
+ mov x0, x2
/* Check the magic value */
ldr x8, [x0], #8
ldr x9, .Lmagic
@@ -110,7 +106,7 @@ ENTRY(longjmp)
ldp d14, d15, [x0]
/* Load the return value */
- mov x0, x1
+ mov x0, x3
ret
b
reg |= GTIMER_CNTV_CTL_ENABLE;
agtimer_set_tval(sc->sc_ticks_per_second);
agtimer_set_ctrl(reg);
}
@@ -381,8 +379,8 @@ agtimer_startclock(void)
pc->pc_nexttickevent = pc->pc_nextstatevent = nextevent;
reg = agtimer_get_ctrl();
- reg &= ~GTIMER_CNTP_CTL_IMASK;
- reg |= GTIMER_CNTP_CTL_ENABLE;
+ reg &= ~GTIMER_CNTV_CTL_IMASK;
+ reg |= GTIMER_CNTV_CTL_ENABLE;
agtimer_set_tval(sc->sc_ticks_per_second);
agtimer_set_ctrl(reg);
}
Dale Rahn dr...@dalerahn.com
On Thu, Feb 23, 2017 at 01:03:57PM +1100, Jonathan Gray wrote:
> On Wed, Feb 22, 2017 at 06:45:52PM -0500, Dale Rahn wrote:
> > Add psci 2.0 features to spin up/down/suspend processors.
> >
> > This change uses extern weak symbols to determine if the platform supports
&
tached and available.
diff --git a/sys/arch/arm64/arm64/cpu.c b/sys/arch/arm64/arm64/cpu.c
new file mode 100644
index 000..6a6f10a9727
--- /dev/null
+++ b/sys/arch/arm64/arm64/cpu.c
@@ -0,0 +1,336 @@
+/* $OpenBSD$ */
+
+/*
+ * Copyright (c) 2016 Dale Rahn
+ * Copyright (c) 1997-2004
+ KERNEL_UNLOCK();
} else {
if (curcpu()->ci_idepth == 0 &&
pcb->pcb_onfault != 0) {
Dale Rahn dr...@dalerahn.com
+ struct psci_softc *sc = psci_sc;
+ if (sc->callfn)
+ return (*sc->callfn)(sc->sc_cpu_on, mpidr, pc, 0);
+ return -1;
+}
Dale Rahn dr...@dalerahn.com
/* page attributes */
};
-#define VM_MDPAGE_INIT(pg) do {\
-LIST_INIT(&((pg)->mdpage.pv_list)); \
- (pg)->mdpage.pvh_attrs = 0; \
+#define VM_MDPAGE_INIT(pg) do {\
+LIST_INIT(&((pg)->mdpage.pv_list));\
+ mtx_init(&(pg)->mdpage.pv_mtx, IPL_VM); \
+ (pg)->mdpage.pvh_attrs = 0; \
} while (0)
#endif /* _LOCORE */
Dale Rahn dr...@dalerahn.com
ookie, char *name);
voidarm_intr_disestablish(void *cookie);
@@ -153,6 +162,7 @@ struct interrupt_controller {
voidarm_intr_init_fdt(void);
voidarm_intr_register_fdt(struct interrupt_controller *);
+voidarm_intr_route_ih(void *, int, int);
void *arm_intr_establish_fdt(int, int, int (*)(void *),
void *, char *);
void *arm_intr_establish_fdt_idx(int, int, int, int (*)(void *),
Dale Rahn dr...@dalerahn.com
On Fri, Feb 17, 2017 at 08:18:36PM +1100, Jonathan Gray wrote:
> On Fri, Feb 17, 2017 at 02:11:55AM -0500, Dale Rahn wrote:
> > The logic to handle PMAP_CANFAIL, the logic was inverted originally.
> >
> > Code has been simplified so that it is test for if !CANFAIL then panic
(strcmp (name, "handle_el0_sync") == 0) ||
+ (strcmp (name, "handle_el1_sync") == 0)) {
+ (*pr)("--- trap ---\n");
+ }
+ }
+ if (INKERNEL(frame)) {
+ if (frame <= lastframe) {
+ (*pr)("Bad frame pointer: 0x%lx\n", frame);
+ break;
+ }
+ } else {
+ if (kernel_only)
+ break;
+ }
+ --count;
}
}
Dale Rahn dr...@dalerahn.com
PMAP_CANFAIL) == 0)
+ panic("pmap_enter: failed to allocate L2/L3");
+ error = ENOMEM;
+ pool_put(&pmap_pted_pool, pted);
+ goto out;
}
}
Dale Rahn dr...@dalerahn.com
On Sat, Oct 15, 2011 at 03:46:51PM -0500, Dale Rahn wrote:
> I first wrote this a while back but it got lost in my trees after I
> updated to a recent snapshot I noticed I was out of processes again,
> that I had > 50 zombie processes sitting around.
>
> I use usbhidaction to pl
ain(int argc, char **argv)
errx(1, "report too large");
(void)signal(SIGHUP, sighup);
+ (void)signal(SIGCHLD, sigchild);
if (demon) {
if (daemon(0, 0) < 0)
Dale Rahn dr...@dalerahn.com
generally only floating point operations trigger misalignment
exceptions. I know of no integer operations that will trigger an alignment
exception in big endian mode.
Dale Rahn dr...@dalerahn.com
# save ps_strings
> subq$DL_DATA_SIZE, %rsp # allocate dl_data
>
It seems like fixing up the address in the kernel would be a good idea,
However having ld.so validate the alignment is good.
ok drahn@
Dale Rahn dr...@dalerahn.com
refcount; /* dep libs only */
int opencount; /* # dlopen() & exe */
@@ -233,6 +236,7 @@ extern elf_object_t *_dl_objects;
extern elf_object_t *_dl_last_object;
extern elf_object_t *_dl_loading_object;
+void _dl_append_search(elf_object_t *object);
ext
OCONS) && constty == NULL && c != '\0')
+ if ((flags & TOCONS) && (constty == NULL || ddb_active) && c != '\0')
(*v_putc)(c);
#ifdef DDB
if (flags & TODDB)
Dale Rahn dr...@dalerahn.com
KASSERT(vm_map_pmap(map) == pmap_kernel());
Dale Rahn dr...@dalerahn.com
I recalled that the ldscript aligned the pages on 64k boundaries,
but that does not appear to be the case. Not certian why 32k would be
desireable.
Will look into this more.
Dale Rahn dr...@dalerahn.com
CC should already be the cross compiler
-.elif exists(${.CURDIR}/../cc/obj)
+.elif ${.OBJDIR} != ${.CURDIR}
CC=${.OBJDIR}/../cc/cc -B ${.OBJDIR}/../cc1
.else
CC=${.CURDIR}/../cc/cc -B ${.CURDIR}/../cc1
Dale Rahn dr...@dalerahn.com
m has not been build with threading enabled (-pthread
missing).
Dale Rahn dr...@dalerahn.com
at someone has forgotten
> to commit a file, so I have filled this file with a dummy
> one in my diff.
>
Fixes, and the missing file are committed now, however I cannot test
at the moment (on vacation) so testing would be appreciated.
Dale Rahn dr...@dalerahn.com
_pc, sc->sc_tag,
+ EHCI_VT6202_WORKAROUND_REG, value | 0x2000);
+ }
+ break;
}
/* Map and establish the interrupt. */
Dale Rahn dr...@dalerahn.com
46 matches
Mail list logo
