Re: audioctl: display variables periodically

2022-12-09 Thread Alexandre Ratchov
On Fri, Dec 09, 2022 at 12:43:31PM -0600, Scott Cheloha wrote: > On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote: > > This diff adds an option to display variables periodically. Basically > > it replaces this usage: > > > > while sleep 1; do audioctl play.errors; done > > >

Re: Unlock in_ioctl_get(), push kernel lock into in_ioctl_{set,change}_ifaddr()

2022-12-09 Thread Klemens Nanni
On Wed, Nov 30, 2022 at 06:17:51PM +, Klemens Nanni wrote: > Follow up on how in6_ioctl() does it: grab the kernel lock in all the > ioctl specific functions, where needed and not earlier, i.e. exactly where > the net lock is currently taken/released. > > Like in6_ioctl_get(), in_ioctl_get()

sparc64: don't install %TICK timecounter on UltraSPARC IIe

2022-12-09 Thread Scott Cheloha
The UltraSPARC IIe's %TICK register has a variable frequency. See section 2.3 in this document here: https://web.archive.org/web/20221028065731/https://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/ultrasparc-iie-2516664.pdf Timecounters need to have a constant fre

Move solock() down to pru_connect2 handlers

2022-12-09 Thread Vitaliy Makkoveev
Only unix(4) sockets have pru_connect2() support. This movement makes soconnect2() just pru_connect2() wrapper and removes "persocket" logic from this path. Since the pru_*() request handlers are the separate functions, this doesn't introduce locking inconsistency to the pcb layer. Also, we alread

hostname.if(5): lladdr tweaks

2022-12-09 Thread Jason McIntyre
hi. two points about the recent ability to use lladdr: - the example of "bridge0" made sense when bridge was regarded as a separate entity and not integrated with ifconfig. plus a list of one example looks rubbish. now that we have a second example (lladdr) and bridge is not flagged as a sp

Re: audioctl: display variables periodically

2022-12-09 Thread Scott Cheloha
On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote: > This diff adds an option to display variables periodically. Basically > it replaces this usage: > > while sleep 1; do audioctl play.errors; done > > by > > audioctl -w 1 play.errors > > The purpose of above audioct

Re: sxitimer(4): switch to clockintr

2022-12-09 Thread Mark Kettenis
> Date: Fri, 9 Dec 2022 11:28:43 -0600 > From: Scott Cheloha > > sxitimer(4) is the fourth and final armv7 clock interrupt driver that > needs to switch to clockintr. > > - Remove everything related to STATTIMER. We can multiplex TICKTIMER > to handle all clock interrupt events. > - Remove sx

Re: audioctl: display variables periodically

2022-12-09 Thread Alexandre Ratchov
On Fri, Dec 09, 2022 at 04:24:03PM +, Edd Barrett wrote: > On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote: > > -Display the number of bytes of silence inserted during play buffer > > -underruns since device started: > > +Once per second, display the number of bytes of silence

Re: skeleton mwx(4) - MediaTek MT7921 driver

2022-12-09 Thread Theo de Raadt
If there's someone who wants to dig into this, but lack a card, I have one I can send. Claudio Jeker wrote: > Here is the start of mwx(4) a driver for the MediaTek MT7921 chip which > shipped for example in Lenovo AMD T14 Gen 2 laptops. > So far the firmware loading works reliably and also the v

Re: Introduce `sb_state' and move SS_CANTSENDMORE to SBS_CANTSENDMORE

2022-12-09 Thread Todd C . Miller
On Fri, 09 Dec 2022 19:48:02 +0300, Vitaliy Makkoveev wrote: > This time, socket's buffer lock requires solock() to be held. I'm > working on standalone socket's buffer locking, and I want to commit some > bits. I mean SS_CANTSENDMORE and SS_CANTRCVMORE socket's state bits, > which I want to turn

sxitimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
sxitimer(4) is the fourth and final armv7 clock interrupt driver that needs to switch to clockintr. - Remove everything related to STATTIMER. We can multiplex TICKTIMER to handle all clock interrupt events. - Remove sxitimer-specific clock interrupt scheduling bits and randomized statclock bi

Re: dmtimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
On Fri, Dec 09, 2022 at 06:03:38PM +0100, Mark Kettenis wrote: > > Date: Fri, 9 Dec 2022 10:32:26 -0600 > > From: Scott Cheloha > > > > dmtimer(4) is a third armv7 clock interrupt driver that needs to > > switch to clockintr. > > > > - Remove dmtimer-specific clock interrupt scheduling bits and

skeleton mwx(4) - MediaTek MT7921 driver

2022-12-09 Thread Claudio Jeker
Here is the start of mwx(4) a driver for the MediaTek MT7921 chip which shipped for example in Lenovo AMD T14 Gen 2 laptops. So far the firmware loading works reliably and also the various DMA ring operate. It is possible to send commands and get answers. The problem where I got stuck now for a whi

Introduce `sb_state' and move SS_CANTSENDMORE to SBS_CANTSENDMORE

2022-12-09 Thread Vitaliy Makkoveev
This time, socket's buffer lock requires solock() to be held. I'm working on standalone socket's buffer locking, and I want to commit some bits. I mean SS_CANTSENDMORE and SS_CANTRCVMORE socket's state bits, which I want to turn into per buffer state. The diff below introduces per buffer `sb_state'

Re: dmtimer(4): switch to clockintr

2022-12-09 Thread Mark Kettenis
> Date: Fri, 9 Dec 2022 10:32:26 -0600 > From: Scott Cheloha > > dmtimer(4) is a third armv7 clock interrupt driver that needs to > switch to clockintr. > > - Remove dmtimer-specific clock interrupt scheduling bits and > randomized statclock bits. > - Add dmtimer_reset_tisr(). We need to clea

dmtimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
dmtimer(4) is a third armv7 clock interrupt driver that needs to switch to clockintr. - Remove dmtimer-specific clock interrupt scheduling bits and randomized statclock bits. - Add dmtimer_reset_tisr(). We need to clear the pending interrupt bits in multiple spots in exactly the same way, see

Re: audioctl: display variables periodically

2022-12-09 Thread Edd Barrett
On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote: > -Display the number of bytes of silence inserted during play buffer > -underruns since device started: > +Once per second, display the number of bytes of silence inserted > +during play buffer underruns since device started: Woul

amptimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
Next up for the armv7 clockintr switch: amptimer(4). - Remove amptimer-specific clock interrupt scheduling bits and randomized statclock bits. - Remove debug evcounts. The interrupt's evcount counts all clock interrupts from now on. - Remove unused USE_GTIMER_CMP pieces. - Wire up amptimer_in

Re: agtimer(4/armv7): switch to clockintr

2022-12-09 Thread Scott Cheloha
On Thu, Dec 08, 2022 at 11:35:34AM +0100, Jeremie Courreges-Anglas wrote: > On Wed, Dec 07 2022, Scott Cheloha wrote: > > ARMv7 has four interrupt clocks available. I think it'll be easier to > > review/test if we do the clockintr switch driver by driver instead of > > all at once in a massive si

asr: increase MAXTOKEN to 128 and documentation

2022-12-09 Thread Alvar Penning
Hi everyone, When recently working on a project involving lots of aliases per line in the /etc/hosts file, I occurred a bug that only the first ten names per line were resolvable. The origin is found in libc's asr MAXTOKEN constant, which had a rather small value of 10. To my knowledge it is used

bgpctl switch ometric to timespec

2022-12-09 Thread Claudio Jeker
cheloha@ switched the bgpctl code to use struct timespec and a monotonic clock. Adjust the ometric code to use a timespec internally so that there is no need to convert from timespec to timeval. -- :wq Claudio Index: ometric.c === R

audioctl: display variables periodically

2022-12-09 Thread Alexandre Ratchov
This diff adds an option to display variables periodically. Basically it replaces this usage: while sleep 1; do audioctl play.errors; done by audioctl -w 1 play.errors The purpose of above audioctl commands is to debug underruns, so we don't want to fork a new process and reopen