Re: [patch] Re: Possible sasyncd memory leak ?

2019-03-20 Thread Otto Moerbeek
On Thu, Mar 21, 2019 at 12:51:11AM +0100, Klemens Nanni wrote: > > On Tue, Mar 12, 2019 at 03:19:56PM +0100, Otto Moerbeek wrote: > > > I also fixed a case of parsing IPv6 addresses. > > > > > > Anyone willing to ok? > See comments inline. > > > And now also with a lexer bug fixed. Earlier I tho

pci_sdhc: Intel eMMC controller fix

2019-03-20 Thread James Hastings
On Intel Apollo Lake and Gemini Lake systems with pci eMMC sdhc controller I encounter: sdhc1 at pci0 dev 28 function 0 "Intel Apollo Lake eMMC" rev 0x0b: apic 1 int 39 sdhc1: SDHC 3.0, 200 MHz base clock sdmmc1 at sdhc1: 8-bit, sd high-speed, mmc high-speed, dma ... sdmmc1: can't enable card The

Re: [patch] Re: Possible sasyncd memory leak ?

2019-03-20 Thread Klemens Nanni
On Tue, Mar 12, 2019 at 03:19:56PM +0100, Otto Moerbeek wrote: > > I also fixed a case of parsing IPv6 addresses. > > > > Anyone willing to ok? See comments inline. > And now also with a lexer bug fixed. Earlier I thougt it was an order > dependency in the clauses. But is was an order dependency