Re: Add support to AR5424

2010-04-26 Thread Alexander Vladimirov
On Mon, 26 Apr 2010 20:59:45 +0100 Luis Henriques wrote: > @@ -1150,9 +1179,17 @@ ar5k_ar5212_reset_tx_queue(struct ath_ha > /* >* Set misc registers >*/ > + /* Enable DCU early termination for this queue */ > AR5K_REG_WRITE(AR5K_AR5212_QCU_MISC(queue), >

Sizinde Doğalgaz Projesine İhtiyacınız olabilir (Okuyunuz ve not ediniz)

2010-04-26 Thread des...@pro-tes.com
]yi g|nler Sizinde Dopalgaz Projesine ]htiyac}n}z olabilir (Okuyunuz ve not ediniz) ]GDA^, abonelerinin tesisatlar}n}n bilgisi dahilinde olmas}n} ister Kimlerin Dopalgaz projesine ihtiyac} vard}r.. - Yeni dopalgaz tesisat} yap}ld}p}nda. Yap}lan tesisat}n ]GDA^ a bildirilmesi.. -

Re: Add support to AR5424

2010-04-26 Thread Luis Henriques
On Mon, Apr 26, 2010 at 05:04:49PM +0100, Stuart Henderson wrote: > AR5424 14.2 phy 7.0 rf 10.2, WOR5_ETSIC > > ar5212.c:ar5k_ar5212_reset() resets tx queues. > I inserted a printf as follows...: > > /* > * Reset queues and start beacon timers at the end of the reset > routine >

Re: diff to fix/clean up ep(4) ioctl handler.

2010-04-26 Thread J.C. Roberts
On Tue, 20 Apr 2010 23:22:21 -0400 Brad wrote: > A diff for the ep(4) 3Com EtherLink III driver to clean up the ioctl > handler code a bit and eliminate unnecessary resets when > reconfiguring IP addresses. First I tried to establish a baseline *without* your patch only to find the 3C595-TX ep(4

Re: Add support to AR5424

2010-04-26 Thread Tom Murphy
On Mon, Apr 26, 2010 at 03:38:19PM +0100, Luis Henriques wrote: > On Mon, Apr 26, 2010 at 7:57 AM, Tom Murphy wrote: > > Hi Luis, > > > > Yes, that is correct. Do you need the rf value from the patched kernel? > > I basically patched the latest -CURRENT (cvs tree as of yesterday). > > Ok, thanks

Re: Add support to AR5424

2010-04-26 Thread Stuart Henderson
AR5424 14.2 phy 7.0 rf 10.2, WOR5_ETSIC ar5212.c:ar5k_ar5212_reset() resets tx queues. I inserted a printf as follows...: /* * Reset queues and start beacon timers at the end of the reset routine */ for (i = 0; i < hal->ah_capabilities.cap_queues.q_tx_num; i++) {

Re: Add support to AR5424

2010-04-26 Thread Luis Henriques
On Mon, Apr 26, 2010 at 4:03 PM, Adam M. Dutko wrote: > The previous patches you sent me off list gave me this: > ath0 at pci2 dev 0 function 0 "Atheros AR5424" rev 0x01: apic 2 int 17 (irq > 10) > ath0: AR5424 14.2 phy 7.0 rf 10.2, WOR0W, address XX:XX:XX:XX:XX:XX > I'm going to evaluate the new

Re: Add support to AR5424

2010-04-26 Thread Adam M. Dutko
The previous patches you sent me off list gave me this: ath0 at pci2 dev 0 function 0 "Atheros AR5424" rev 0x01: apic 2 int 17 (irq 10) ath0: AR5424 14.2 phy 7.0 rf 10.2, WOR0W, address XX:XX:XX:XX:XX:XX I'm going to evaluate the new ones tonight and will let you know.

Re: Add support to AR5424

2010-04-26 Thread Luis Henriques
On Mon, Apr 26, 2010 at 7:57 AM, Tom Murphy wrote: > Hi Luis, > > Yes, that is correct. Do you need the rf value from the patched kernel? > I basically patched the latest -CURRENT (cvs tree as of yesterday). Ok, thanks. I just wanted to make sure the patch was identifing correctly your card. The

Re: Add support to AR5424

2010-04-26 Thread Tom Murphy
On Sun, Apr 25, 2010 at 10:49:26PM +0100, Luis Henriques wrote: > On Sun, Apr 25, 2010 at 08:29:35PM +0100, Tom Murphy wrote: > > Luis, > > > > I have an Asus EEE with uses an AR5424 chipset: > > > > ath0 at pci3 dev 0 function 0 "Atheros AR5424" rev 0x01: apic 1 int 18 (irq > > 10) > > ath0: