Hi Clément,
On Thu, Oct 17, 2024 at 10:14 PM Clément Léger wrote:
>
>
> On 14/10/2024 20:19, frank.ch...@sifive.com wrote:
> > @@ -1679,6 +1718,20 @@ void riscv_cpu_do_interrupt(CPUState *cs)
> > target_ulong mtval2 = 0;
> > int sxlen = 0;
> > int mxlen = 0;
> > + bool nnmi_excep
With the current implementation, if we had the current scenario:
- set bit x in menvcfg
- set bit x in henvcfg
- clear bit x in menvcfg
then, the internal variable env->henvcfg would still contain bit x due
to both a wrong menvcfg mask used in write_henvcfg() as well as a
missing update of henvcfg
When the Ssdbltrp extension is enabled, SSTATUS.SDT field is cleared
when executing sret. When executing mret/mnret, SSTATUS.SDT is cleared
when returning to U, VS or VU and VSSTATUS.SDT is cleared when returning
to VU from HS.
Signed-off-by: Clément Léger
---
target/riscv/op_helper.c | 35 +
Add ext_ssdbltrp in RISCVCPUConfig and implement MSTATUS.SDT,
{H|M}ENVCFG.DTE and modify the availability of MTVAL2 based on the
presence of the Ssdbltrp ISA extension.
Signed-off-by: Clément Léger
---
target/riscv/cpu.h| 1 +
target/riscv/cpu_bits.h | 6
target/riscv/cpu_cfg.h
When the Smsdbltrp ISA extension is enabled, if a trap happens while
MSTATUS.MDT is already set, it will trigger an abort or an NMI is the
Smrnmi extension is available.
Signed-off-by: Clément Léger
---
target/riscv/cpu_helper.c | 52 +--
1 file changed, 34 in
Add `ext_smdbltrp`in RISCVCPUConfig and implement MSTATUS.MDT behavior.
Also set MDT to 1 at reset according to the specification.
Signed-off-by: Clément Léger
---
target/riscv/cpu.c | 3 +++
target/riscv/cpu_bits.h | 1 +
target/riscv/cpu_cfg.h | 1 +
target/riscv/csr.c | 13 +
When the Ssdbltrp ISA extension is enabled, if a trap happens in S-mode
while SSTATUS.SDT isn't cleared, generate a double trap exception to
M-mode.
Signed-off-by: Clément Léger
---
target/riscv/cpu.c| 2 +-
target/riscv/cpu_bits.h | 1 +
target/riscv/cpu_helper.c | 42 ++
When the Ssdbltrp extension is enabled, SSTATUS.MDT field is cleared
when executing sret if executed in M-mode. When executing mret/mnret,
SSTATUS.MDT is cleared.
Signed-off-by: Clément Léger
---
target/riscv/op_helper.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/ri
Add the switch to enable the Ssdbltrp ISA extension.
Signed-off-by: Clément Léger
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 5224eb356d..39555364bf 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -190,6 +
Extract the first part of the AccelState init_machine function into
a new function preinit, which can be called without knowing any
machine properties. For now call preinit and init_machine at the
same place, so no functional change.
Signed-off-by: Steve Sistare
---
accel/accel-system.c
Split configure_accelerators into a first function (still named
configure_accelerators) that loops and chooses the first accelerator
for which preinit succeeds, and a second function create_accelerator
which calls machine_init on the chosen accelerator.
configure_accelerators can be called without
Extract a subroutine from user_creatable_add_qapi that converts object
options to a dictionary of properties and returns them. Use g_autoptr
to simplify the code. No functional change.
Signed-off-by: Steve Sistare
---
include/qapi/visitor.h | 1 +
include/qom/object_interfaces.h | 8
Refactor qemu_init into actions performed during the precreate phase,
and actions performed when exiting precreate. For now, always exit
the precreate phase immediately at init time. Future patches will add
conditions that cause QEMU to linger in the precreate phase while running
the main loop.
Guard against unconfigured state if cleanup is called early, such as
during the precreate phase.
Signed-off-by: Steve Sistare
---
net/net.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/net/net.c b/net/net.c
index d9b23a8..207fdb0 100644
--- a/net/net.c
+++ b/net/net.c
@
Allow various migration commands during the precreate and preconfig phases
so migration may be set up and initiated at that time.
Signed-off-by: Steve Sistare
---
hmp-commands.hx | 2 ++
qapi/migration.json | 16 +++-
qapi/misc.json | 3 ++-
3 files changed, 15 insertions(
Complete monitor connections as early as possible, prior to
qemu_create_early_backends, so the user can issue commands during the
precreate phase.
Make a list of the chardev's referenced by all monitors. Create the
chardevs, then create the monitors. Exclude monitor chardevs and
monitors from th
Define an accessor that returns the chardev name in monitor options.
Signed-off-by: Steve Sistare
---
include/monitor/monitor.h | 1 +
monitor/monitor.c | 21 +
2 files changed, 22 insertions(+)
diff --git a/include/monitor/monitor.h b/include/monitor/monitor.h
inde
Make all global and compat properties available before the first objects
are created. Set accelerator compatibility properties in
configure_accelerators, when the accelerator is chosen, and call
configure_accelerators earlier. Set machine options earlier.
Signed-off-by: Steve Sistare
---
accel
Initialize the migration object as early as possible so that migration
configuration commands may be sent during the precreate phase. Also,
start listening for the incoming migration connection during precreate,
so that the listen port number is assigned (if dynamic), and the user
can discover it
Pass the entire options object to the foreach filter function, rather
than just the type name, so more aspects of the object can be used as
filter criteria in future patches. No functional change.
Signed-off-by: Steve Sistare
---
system/vl.c | 20
1 file changed, 12 inserti
On 10/17/2024 11:14 AM, Steve Sistare wrote:
Define a new qemu initialization phase called 'precreate' which occurs
before most backends or devices have been created. The only exception
is monitor and qtest devices and their associated chardevs.
QEMU runs in the main loop during this phase. Mo
cc Xen, whpx, and nvmm accelerator maintainers for this accelerator-specific
patch.
The cover letter for this series is here:
https://lore.kernel.org/qemu-devel/1729178055-207271-1-git-send-email-steven.sist...@oracle.com
- Steve
On 10/17/2024 11:14 AM, Steve Sistare wrote:
Extract the firs
cc jason.
The cover letter for this series is here:
https://lore.kernel.org/qemu-devel/1729178055-207271-1-git-send-email-steven.sist...@oracle.com
- Steve
On 10/17/2024 11:14 AM, Steve Sistare wrote:
Guard against unconfigured state if cleanup is called early, such as
during the precreate ph
On Sat, Oct 12, 2024 at 06:44:28PM +0800, Zhao Liu wrote:
> Allow user to configure l1d, l1i, l2 and l3 cache topologies for PC
> machine.
>
> Additionally, add the document of "-machine smp-cache" in
> qemu-options.hx.
>
> Signed-off-by: Zhao Liu
> Tested-by: Yongwei Ma
> Reviewed-by: Jonathan
On 10/17/24 07:29, Peter Maydell wrote:
On Thu, 17 Oct 2024 at 15:12, Guenter Roeck wrote:
On 10/17/24 05:42, Peter Maydell wrote:
On Tue, 15 Oct 2024 at 19:12, Guenter Roeck wrote:
Please let me know if https://github.com/groeck/linux-test-downloads.git
meets your needs. For now I added 'c
On Sat, Oct 12, 2024 at 06:44:23PM +0800, Zhao Liu wrote:
> Cache topology needs to be defined based on CPU topology levels. Thus,
> define CPU topology enumeration in qapi/machine.json to make it generic
> for all architectures.
>
> To match the general topology naming style, rename CPU_TOPO_LEVE
On Thu, Oct 17, 2024 at 11:19:51AM -0400, Steven Sistare wrote:
> On 10/17/2024 11:14 AM, Steve Sistare wrote:
> > Define a new qemu initialization phase called 'precreate' which occurs
> > before most backends or devices have been created. The only exception
> > is monitor and qtest devices and t
In regime_is_user() we assert if we're passed an ARMMMUIdx_E10_*
mmuidx value. This used to make sense because we only used this
function in ptw.c and would never use it on this kind of stage 1+2
mmuidx, only for an individual stage 1 or stage 2 mmuidx.
However, when we implemented FEAT_E0PD we ad
On 17/10/2024 18.32, Peter Maydell wrote:
Add a functional test for the collie board that uses the kernel and
rootfs provided by Guenter Roeck in the linux-test-downloads repo:
https://github.com/groeck/linux-test-downloads/
This just boots Linux with a userspace that immediately reboots
the b
On 17/10/2024 18.32, Peter Maydell wrote:
Add a functional test for the sx1 board that uses the kernel and
rootfs provided by Guenter Roeck in the linux-test-downloads repo:
https://github.com/groeck/linux-test-downloads/
We have three variants of the test for this board:
* just boot initrd
The following changes since commit f774a677507966222624a9b2859f06ede7608100:
Merge tag 'pull-target-arm-20241015-1' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2024-10-15
15:18:22 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/f
On 10/17/24 10:23, Peter Maydell wrote:
In regime_is_user() we assert if we're passed an ARMMMUIdx_E10_*
mmuidx value. This used to make sense because we only used this
function in ptw.c and would never use it on this kind of stage 1+2
mmuidx, only for an individual stage 1 or stage 2 mmuidx.
Ho
On 10/16/24 22:09, Michael Tokarev wrote:
The following patches are queued for QEMU stable v9.1.1:
https://gitlab.com/qemu-project/qemu/-/commits/staging-9.1
Patch freeze is 2024-10-16 (frozen), and the release is planned for 2024-10-18:
https://wiki.qemu.org/Planning/9.1
Please respond
On 17/10/24 13:07, Peter Maydell wrote:
On Thu, 17 Oct 2024 at 16:29, Guenter Roeck wrote:
By the way, it looks to me like QEMU has a regression
somewhere where we can't boot that sx1 test for the SD
card version -- it hangs during kernel boot waiting for
the MMC card. (An elderly QEMU binar
yong.hu...@smartx.com writes:
> From: Hyman Huang
>
> Signed-off-by: Hyman Huang
> ---
> accel/tcg/icount-common.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/accel/tcg/icount-common.c b/accel/tcg/icount-common.c
> index 8d3d3a7e9d..30bf8500dc 100644
> --- a/accel/tcg/icount-common.
yong.hu...@smartx.com writes:
> From: Hyman Huang
>
> Since CPU throttling only occurs when auto-converge
> is on, stop it conditionally.
>
> Signed-off-by: Hyman Huang
> ---
> migration/migration.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/migration/migration.
yong.hu...@smartx.com writes:
> From: Hyman Huang
>
> Move cpu-throttle.c from system to migration since it's
> only used for migration; this makes us avoid exporting the
> util functions and variables in misc.h but export them in
> migration.h when implementing the periodic ramblock dirty
> sync
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