, "npiggin" , "David Gibson"
>
> Sent: Thursday, April 21, 2022 1:35:50 AM
> Subject: Re: XIVE VFIO kernel resample failure in INTx mode under heavy load
> On 4/21/22 05:07, Alexey Kardashevskiy wrote:
>>
>>
>> On 14/04/2022 22:41, Cédric Le Go
On 4/21/22 05:07, Alexey Kardashevskiy wrote:
On 14/04/2022 22:41, Cédric Le Goater wrote:
After re-reading what I just wrote, I am leaning towards disabling use of
KVM_CAP_IRQFD_RESAMPLE as it seems last worked on POWER8 and never since :)
Did I miss something in the picture (hey Cedric)?
On 14/04/2022 22:41, Cédric Le Goater wrote:
After re-reading what I just wrote, I am leaning towards disabling
use of KVM_CAP_IRQFD_RESAMPLE as it seems last worked on POWER8 and
never since :)
Did I miss something in the picture (hey Cedric)?
How about disabling it like this?
=
d
Tested on POWER9 with a passed through XHCI host and "-append pci=nomsi" and
"-machine pseries,ic-mode=xics,kernel_irqchip=on" (and s/xics/xive/).
ok. This is deactivating the default XIVE (P9+) mode at the platform level,
hence forcing the XICS (P8) mode in a POWER9 guest running on a POWER9 h
On 14/04/2022 22:31, Cédric Le Goater wrote:
Hello Alexey,
Thanks for taking over.
On 4/13/22 06:56, Alexey Kardashevskiy wrote:
On 3/17/22 06:16, Cédric Le Goater wrote:
Timothy,
On 3/16/22 17:29, Cédric Le Goater wrote:
Hello,
I've been struggling for some time with what is looki
After re-reading what I just wrote, I am leaning towards disabling use of
KVM_CAP_IRQFD_RESAMPLE as it seems last worked on POWER8 and never since :)
Did I miss something in the picture (hey Cedric)?
How about disabling it like this?
=
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci
Hello Alexey,
Thanks for taking over.
On 4/13/22 06:56, Alexey Kardashevskiy wrote:
On 3/17/22 06:16, Cédric Le Goater wrote:
Timothy,
On 3/16/22 17:29, Cédric Le Goater wrote:
Hello,
I've been struggling for some time with what is looking like a
potential bug in QEMU/KVM on the POWER9
On 4/13/22 14:56, Alexey Kardashevskiy wrote:
On 3/17/22 06:16, Cédric Le Goater wrote:
Timothy,
On 3/16/22 17:29, Cédric Le Goater wrote:
Hello,
I've been struggling for some time with what is looking like a
potential bug in QEMU/KVM on the POWER9 platform. It appears that
in XIVE mo
On 3/17/22 06:16, Cédric Le Goater wrote:
Timothy,
On 3/16/22 17:29, Cédric Le Goater wrote:
Hello,
I've been struggling for some time with what is looking like a
potential bug in QEMU/KVM on the POWER9 platform. It appears that
in XIVE mode, when the in-kernel IRQ chip is enabled, an ex
On 15/03/2022 09:09, Alex Williamson wrote:
[Cc +Alexey]
On Fri, 11 Mar 2022 12:35:45 -0600 (CST)
Timothy Pearson wrote:
All,
I've been struggling for some time with what is looking like a
potential bug in QEMU/KVM on the POWER9 platform. It appears that in
XIVE mode, when the in-kernel
Timothy,
On 3/16/22 17:29, Cédric Le Goater wrote:
Hello,
I've been struggling for some time with what is looking like a
potential bug in QEMU/KVM on the POWER9 platform. It appears that
in XIVE mode, when the in-kernel IRQ chip is enabled, an external
device that rapidly asserts IRQs via th
Hello,
I've been struggling for some time with what is looking like a
potential bug in QEMU/KVM on the POWER9 platform. It appears that
in XIVE mode, when the in-kernel IRQ chip is enabled, an external
device that rapidly asserts IRQs via the legacy INTx level mechanism
will only receive one i
[Cc +Alexey]
On Fri, 11 Mar 2022 12:35:45 -0600 (CST)
Timothy Pearson wrote:
> All,
>
> I've been struggling for some time with what is looking like a
> potential bug in QEMU/KVM on the POWER9 platform. It appears that in
> XIVE mode, when the in-kernel IRQ chip is enabled, an external device
;Timothy Pearson"
> To: "qemu-devel"
> Sent: Friday, March 11, 2022 12:35:45 PM
> Subject: XIVE VFIO kernel resample failure in INTx mode under heavy load
> All,
>
> I've been struggling for some time with what is looking like a potential bug
> in
>
All,
I've been struggling for some time with what is looking like a potential bug in
QEMU/KVM on the POWER9 platform. It appears that in XIVE mode, when the
in-kernel IRQ chip is enabled, an external device that rapidly asserts IRQs via
the legacy INTx level mechanism will only receive one int
15 matches
Mail list logo
