On 8/29/20 1:00 PM, Richard Henderson wrote:
> static bool require_rvf(Disascontext *s)
> {
> switch (s->sew) {
> case MO_16:
> case MO_32:
> return has_ext(s, RVF);
> case MO_64:
> return has_ext(s, RVD);
> default:
> return false;
> }
> }
Oh, and c
On 8/17/20 1:49 AM, frank.ch...@sifive.com wrote:
> static bool trans_vfmv_v_f(DisasContext *s, arg_vfmv_v_f *a)
> {
> if (require_rvv(s) &&
> +has_ext(s, RVF) &&
> vext_check_isa_ill(s) &&
> require_align(a->rd, 1 << s->lmul) &&
> (s->sew != 0)) {
> +
From: Frank Chang
NaN-boxed the scalar floating-point register based on RVV 1.0's rules.
Signed-off-by: Frank Chang
---
target/riscv/insn_trans/trans_rvv.inc.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/riscv/insn_trans/trans_rvv.inc.c
b/target/risc
