On Mon, 16 Jan 2023 14:37:23 +
Jonathan Cameron via wrote:
> On Fri, 13 Jan 2023 17:10:51 +
> Fan Ni wrote:
>
> > On Fri, Jan 13, 2023 at 09:47:25AM +, Jonathan Cameron wrote:
> >
> > > On Fri, 13 Jan 2023 00:27:55 +
> > > Fan Ni wrote:
> > >
> > > > For passthrough dec
On Fri, 13 Jan 2023 17:10:51 +
Fan Ni wrote:
> On Fri, Jan 13, 2023 at 09:47:25AM +, Jonathan Cameron wrote:
>
> > On Fri, 13 Jan 2023 00:27:55 +
> > Fan Ni wrote:
> >
> > > For passthrough decoder (a decoder hosted by a cxl component with only
> > > one downstream port), its cac
On Fri, Jan 13, 2023 at 09:47:25AM +, Jonathan Cameron wrote:
> On Fri, 13 Jan 2023 00:27:55 +
> Fan Ni wrote:
>
> > For passthrough decoder (a decoder hosted by a cxl component with only
> > one downstream port), its cache_mem_registers field COMMITTED
> > (see spec 2.0 8.2.5.12 - CXL H
On Fri, 13 Jan 2023 00:27:55 +
Fan Ni wrote:
> For passthrough decoder (a decoder hosted by a cxl component with only
> one downstream port), its cache_mem_registers field COMMITTED
> (see spec 2.0 8.2.5.12 - CXL HDM Decoder Capability Structure) will not
> be set by the current Linux CXL dri
For passthrough decoder (a decoder hosted by a cxl component with only
one downstream port), its cache_mem_registers field COMMITTED
(see spec 2.0 8.2.5.12 - CXL HDM Decoder Capability Structure) will not
be set by the current Linux CXL driver. Without the fix, for a cxl
topology setup with a singl
