Re: [Qemu-devel] irq latency and tcg

2009-12-07 Thread Paul Brook
> > Using -icount should give you precise interrupt delivery. > > That's what I thought, but as I reported a few days ago, I couldn't > find a good value for icount when using OBP. > I tried a few values but keep getting "qemu: fatal: Raised interrupt > while not in I/O function". That's almost c

Re: [Qemu-devel] irq latency and tcg

2009-12-07 Thread Artyom Tarasenko
2009/12/7 Paul Brook : > On Monday 07 December 2009, Artyom Tarasenko wrote: >> Can it be that qemu (-system-sparc in my case, but I guess it's more >> or less similar on all platforms) reacts to irqs slower than a real >> hardware due to tcg optimizations? > > Interrupts generally only trigger at

Re: [Qemu-devel] irq latency and tcg

2009-12-07 Thread Paul Brook
On Monday 07 December 2009, Artyom Tarasenko wrote: > Can it be that qemu (-system-sparc in my case, but I guess it's more > or less similar on all platforms) reacts to irqs slower than a real > hardware due to tcg optimizations? Interrupts generally only trigger at branch instructions, or similar

[Qemu-devel] irq latency and tcg

2009-12-07 Thread Artyom Tarasenko
Can it be that qemu (-system-sparc in my case, but I guess it's more or less similar on all platforms) reacts to irqs slower than a real hardware due to tcg optimizations? I see one test pattern which fails on qemu: nop * N What I observe is that the proper interrupt does take a place, but aft